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PDF V236H1-P01 Data sheet ( Hoja de datos )
| Número de pieza | V236H1-P01 | |
| Descripción | TFT LCD | |
| Fabricantes | CHI MEI | |
| Logotipo |  |
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Doc No.: 400039933
Issued Date: Oct 19, 2009
Model No.: V236H1-P01
Approval
TFT LCD Approval Specification
MODEL NO.: V236H1-P01
Customer :
Approved by :
Note :
核准時間
部門
2009-10-29
08:48:56
MTR
產品管理處
審核
角色 投票
2009.10.29
Director Accept
1 / 24
Version 2.1
1 page  
Doc No.: 400039933
Issued Date: Oct 19, 2009
Model No.: V236H1-P01
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO MODULE V236H1-L01)
Item
Storage Temperature
Operating Ambient Temperature
Symbol
TST
TOP
Value
Min. Max.
-20 +60
0 +50
Unit Note
ºC (1)
ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ≦ 40 ºC)
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC)
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)
High temperature or humidity may reduce the performance of panel. Please store LCD panel within the
specified storage conditions.
Storage Condition: With packing
Storage temperature range: 25±5 ºC
Storage humidity range: 50±10%RH
Shelf life: 30days
2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)
Item
Power Supply Voltage
Logic Input Voltage
Symbol
VCC
Vlogic
Value
Min
-0.3
-0.3
Max
+6.0
+3.6
Unit
V
V
Note
(1)
Note (1) Permanent damage might occur if the module is operated at conditions exceeding the maximum
values.
5 / 24
Version 2.1
5 Page 
Doc No.: 400039933
Issued Date: Oct 19, 2009
Model No.: V236H1-P01
Approval
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal
Item
Frequency
Period
Input cycle to
cycle jitter
Spread spectrum
LVDS Clock
modulation range
Spread spectrum
modulation
frequency
High Time
Low Time
LVDS Data
Setup Time
Hold Time
Frame Rate
Vertical Active Display Term
Total
Display
Blank
Horizontal Active Display
Term
Total
Display
Blank
Symbol Min.
Fc 58.54
Tc -
Typ.
74.25
13.47
Max.
98
-
Trcl -0.02*Tc - 0.02*Tc
Fclkin_mod 0.98*Fc - 1.02*Fc
FSSM
Tch
Tcl
Tlvs
Tlvh
Fr
Tv
Tvd
Tvb
Th
Thd
Thb
- - 200
-
-
600
600
50
1115
1080
35
1050
960
90
4/7
3/7
-
-
60
1125
1080
45
1100
960
140
-
-
-
-
75
1136
1080
56
1150
960
190
Unit
MHz
ns
ns
MHz
KHz
Tc
Tc
ps
ps
Hz
Th
Th
Th
Tc
Tc
Tc
Note
-
(1)
(2)
-
-
(3)
Tv=Tvd+Tvb
-
-
-
Th=Thd+Thb
-
-
Note: (1) Because this module is operated by DE only mode, Hsync and Vsync input signals should be
set to low logic level or ground. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
DE
DATA
TVd
TC Thb
Tv
TVb
Th
Thd
11 / 24
Version 2.1
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