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PDF UPD8022 Data sheet ( Hoja de datos )

Número de pieza UPD8022
Descripción SINGLE CHIP 8-BIT MICROCOMPUTER
Fabricantes NEC 
Logotipo NEC Logotipo



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No Preview Available ! UPD8022 Hoja de datos, Descripción, Manual

NEe Microcomputers, Inc.
NEe
,.,. PD8022
SINGLE CHIP 8-BIT MICROCOMPUTER
WITH ON-CHIP AID CONVERTER
DESCR IPTION
The NEC I1PD8022 is designed for low cost, high volume applications requiring large
ROM space, analog to digital conversion capability, a capacitive touchpanel keyboard
interface and/or a power line time base. The I1PD8022 satisfies these requirements by
integrating on onechip,an 8·bit I1PD8021 type processor with 2K of ROM, a 2 channel
8-bit A/D converter, a high impedance comparator input port, and a zero crossing
detector.
FEATU RES
8-Bit Processor, ROM, RAM, I/O and Clock Generator
• Single +5V Supply (4.5V to 6.5V)
• NMOS Silicon Gate Technology
• 2K x 8 ROM, 64 x 8 RAM, 26 I/O Lines
• On Chip 8-Bit A/D Converter with 2 Input Channels
• 8.311s Instruction Cycle Timer
• Instructions are a Subset of I1PD8048; Superset of I1PD8021
• Internal Timer/Event Counter
• External and Timer/Counter Interrupts
• On-Chip Zero-Cross Detector
• High Impedance Comparator Port with Variable Threshold
• Clock Generator Using a Crystal or Single Inductor
• High Current Drive Capability on 2 I/O Pins
• Expandable I/O Utilizing the I1PD8243
• Available in 40-Pin Plastic Dual-In-Line Package
II
PIN CONFIGURATION
P26
P27
AVee
VAREF
ANl
ANO
AVSS
TO
VTH
Po
Pl
P2
P3
P4
P5
P6
P7
ALE
Tl
VSS
Vee
P25
P24
PROG
P23
P22
P21
P20
P17
P16
P15
P14
P13
P12
P11
P10
RESET
XTAL2
XTALl
SUBST
309

1 page




UPD8022 pdf
AID CONVERTER
CHARACTERISTICS
J.LPD8022
Ta = O°C to 70°C, VCC = S.SV ± 1V, VSS = OV, AVCC = S.SV ± 1V, AVSS = OV
AVC C/2.;; V AREF .;; AVCC
PARAMETER
SYMBOL
MIN
LIMITS
TYP
MAX
UNITS
TEST
CONDITIONS
Resolution
Switch Point Accuracy
Absolute Accuracy
Sample Setup Before
Falling Edge of ALE
Sample Hold After
Falling Edge of ALE
Input Capacitance
(ANO, AN1)
Conversion Time
Conversion Range
Reference Voltage
ASp
AAB
tss
8
±Y2
±1
0.20
BITS
LSB
LSB
tCY
tSH
0.10
tCY
CAD
1 pF
tCNV
VAREF
4
AVSS
AVCC/2
4
!IAREF
AVCC
tCY
V
V
(2)
(J)
CD
CDNote:
The analog signal on ANO and AN1 must remain constant during the sample time
tss + tSH·
TIMING WAVEFORM
~ ::1
o:0 FD
~ 03
f-
oi2 02
01
o
1 LSB
~
,--
II
II
IDEAL TRANSITION
I --..:!--SWITCH POINT
I-L..I
ACCURACY
1 2 3 253 254 255
256 256 256 256 256 256
ANALOGINPUTIOFFULLSCALEI
FS
A~JALOG INPUT
ALE J_,,,~ i==SH -rt
ANALOG
INPUT
II
313

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