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PDF MG64F225 Data sheet ( Hoja de datos )
| Número de pieza | MG64F225 | |
| Descripción | MCU | |
| Fabricantes | Megawin | |
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笙泉科技股份有限公司
Megawin Technology Co., Ltd.
MG64F225
Data Sheet
65C02 MCU with an
USB 2.0 low-speed interface
This document information is the intellectual property of Megawin Technology.
Megawin Technology Co., Ltd. 2011 All right reserved.
QP-7300-03D
1/68
Version 1.00
1 page  
MG64F225 Datasheet
V1.00
2 Features
6502 8-bit CPU Core
4K Bytes MTP ROM
Flash write/erase cycle: 100
Flash data retention: 100 years at 25℃
256 bytes Data SRAM
Data RAM (0100H to 01BFH) and stacks RAM (01C0H to 01FFH).
Address 0100h~01BFH and 0000h~00BFH share the same memory block.
34+2 Programmable GPIO
Port 0 shared 1 pin with FOSC output (6MHz / 3MHz / 1.5MHz)
Port 1 shared 2 pins with T0CKO/PWM0 and T1CKO/PWM1.
Port 2 shared with SPI interface (3 pins) and ICP interface (3 pins)
Port 3 shared with external crystal and external interrupt.
Port 0/1/2/3 support Wakeup Function.
Port 0/1/2/3/4 LED direct sink pins.
Support VDDO pin to setup output voltage.
Master Mode SPI Interface
Clock Rate : 1.5MHz, 750KHz
MSB / LSB of the data byte is transmitted first.
Timer / PWM
8-bit auto-reload timer (Timer0) support T0CKO/PWM0 to P1.1
8-bit auto-reload timer (Timer1) support T1CKO/PWM1 to P1.2
Programmable Watch-dog Timer (WDT)
Programmable system clock (6MHz / 3MHz)
USB 2.0 low speed device controller
Built-in USB low-speed (1.5Mbps) transceiver
8-bytes FIFO for endpoint 0 Control IN/OUT.
8-bytes FIFO for endpoint 1 Interrupt IN.
8-bytes FIFO for endpoint 2 Interrupt IN/OUT, default is IN.
Supports USB suspend/resume and remote wake-up event.
Software-controlled USB disconnection mechanism.
DP/DM combine with PS/2 Mode (PS2_CLK and PS2_Data)
Built-in 5v to 3.3v regulator.
Built-in 6Mhz±1.5% IHRCO with temperature -20℃ ~ 85℃.
Low-Voltage detect: LVDF (Low Voltage detect Flag): 3.6V±5%
Power saving modes
Halt(Idle) mode
Stop(Power-down) mode
Operating condition:
Operating voltage: 2.7V ~ 5.5V with USB off-line application
Operating voltage: 4.0V ~ 5.5V with USB on-line application
Operating speed range: DC to 6MHz @VDD>2.7V
Operating ambient temperature: -20℃ ~ 85℃ for internal oscillator mode
Operating ambient temperature: -20℃ ~ 85℃ for external crystal mode
Package Type
DICE : MG64F225H
LQFP-48 : MG64F225AD48
SSOP-16 : MG64F225AL16
This document information is the intellectual property of Megawin Technology.
Megawin Technology Co., Ltd. 2013 All right reserved.
QP-7300-03D
5/68
5 Page 
MG64F225 Datasheet
V1.00
5 6502 Function Description
5.1 Registers
PCH
1
A
Y
X
P
PCL
S
5.1.1 Accumulator
The accumulator is a general-purpose 8-bit register, which stores the results of most arithmetic and logic
operations. In addition, the accumulator usually contains one of two data words used in these operations.
5.1.2 Index Register(X,Y)
There are two 8-bit index registers (X and Y), which may be used to count program steps or to provide an index
value to be used in generating an effective address. When executing an instruction, which specifies indexed
addressing, the CPU fetches the OP Code and the base address, and modifies the address by adding the index
register to it prior to performing the desired operation. Pre- or post-index of index address is possible.
5.1.3 Processor Status Register
The 8-bit processor status register contains seven status flags. Some of the flags are controlled by the program,
others may be controlled both the program and the CPU.
Bit 7 Bit 6 Bit 5 Bit 4
NV 1 B
N: Signed flag, 1 = negative, 0 = positive
V: Overflow flag, 1 = true, 0 = false
B: BRK interrupt command, 1 = BRK, 0 = IRQB
D: Decimal mode, 1 = true, 0 = false
I: IRQB disable flag, 1 = disable, 0 = enable
Z: Zero flag, 1 = true, 0 = false
C: Carry flag, 1 = true, 0 = false
Bit 3
D
Bit 2
I
Bit 1
Z
Bit 0
C
5.1.4 Program Counter(PC)
The 16-bit program counter register provides the addresses, which step the micro-controller through sequential
program instructions. Each time the micro-controller fetch an instruction from program memory, the lower byte
of the program counter (PCL) is placed on the low-order 8 bits of the address bus and the higher byte of the
program counter (PCH) is placed on the high-order 8 bits. The counter is incremented each time an instruction
or data is fetched from program memory.
5.1.5 Stack Point(S)
The stack pointer is an 8-bit register, which is used to control the addressing of the variable-length stack. The
stack pointer is automatically incremented and decremented under control of the micro-controller to perform
stack manipulations under direction of either the program or interrupts (/NMI or /IRQ). The stack allows simple
implementation of nested subroutines and multiple level interrupts. The stack pointer is initialized by the user’s
firmware.
This document information is the intellectual property of Megawin Technology.
Megawin Technology Co., Ltd. 2013 All right reserved.
QP-7300-03D
11/68
11 Page | ||
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