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PDF MG74PG1A08 Data sheet ( Hoja de datos )

Número de pieza MG74PG1A08
Descripción 8051-Based MCU
Fabricantes Megawin　
Logotipo Megawin Logotipo



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No Preview Available ! MG74PG1A08 Hoja de datos, Descripción, Manual

8051-Based MCU
MG74PG1A08
Data Sheet
Version: 0.25
This document contains information on a new product under development by Megawin. Megawin reserves the right to change or
discontinue this product without notice.
Megawin Technology Co., Ltd. 2005 All rights reserved.
2016/11 version 0.25

1 page




MG74PG1A08 pdf
11.2.9. KBI wakeup Recovery from Power-down.................................................................... 37
11.2.10. USB wakeup Recovery from Power-down .......................................................... 37
11.3. Power Control Register .......................................................................................38
12. Configurable I/O Ports .............................................................................. 40
12.1. IO Structure.........................................................................................................40
12.1.1. Port 3 Analog-Input-Only (High Impedance) Structure................................................ 40
12.1.2. Port 3 Quasi-Bidirectional IO Structure (default) ......................................................... 41
12.1.3. Port 3 Open-Drain Output Structure ........................................................................... 42
12.1.4. Port 3 Push-Pull Output Structure .............................................................................. 42
12.1.5. Port 3 Digital-Input-Only (High Impedance Input) Structure ........................................ 43
12.1.6. DP/DM Structure ........................................................................................................ 43
12.1.7. General Analog-Input-Only (High Impedance) Structure (default)............................... 43
12.1.8. General Open-Drain Output with Pull-up Resistor Structure ....................................... 44
12.1.9. General Open-Drain Output Structure ........................................................................ 44
12.1.10. General Push-Pull Output Structure.................................................................... 45
12.1.11. General Digital-Input-Only (High Impedance Input) Structure ............................. 45
12.2. I/O Port Register .................................................................................................46
12.2.1. Port 1 Register ........................................................................................................... 46
12.2.2. Port 3 Register ........................................................................................................... 47
13. Interrupt.................................................................................................... 48
13.1. Interrupt Structure ...............................................................................................48
13.2. Interrupt Source ..................................................................................................50
13.3. Interrupt Enable...................................................................................................52
13.4. Interrupt Priority...................................................................................................52
13.5. Interrupt Process.................................................................................................53
13.6. Special Interrupt Vector for TI0 ...........................................................................53
13.7. nINT0/nINT1 Input Source Selection...................................................................54
13.8. Interrupt Register ................................................................................................54
14. Timers/Counters....................................................................................... 58
14.1. Timer0 and Timer1 ..............................................................................................58
14.1.1. Mode 0 Structure........................................................................................................ 58
14.1.2. Mode 1 Structure........................................................................................................ 59
14.1.3. Mode 2 Structure........................................................................................................ 60
14.1.4. Mode 3 Structure........................................................................................................ 61
14.1.5. Timer 0/1 Programmable Clock-Out ........................................................................... 62
14.1.6. Timer0/1 Register....................................................................................................... 64
15. Programmable Counter Array (PCA) ........................................................ 66
15.1. PCA Overview.....................................................................................................66
15.2. PCA Timer/Counter .............................................................................................66
15.3. Compare/Capture Modules .................................................................................70
15.4. Operation Modes of the PCA ..............................................................................71
15.4.1. Capture Mode ............................................................................................................ 71
15.4.2. 16-bit Software Timer Mode ....................................................................................... 72
15.4.3. High Speed Output Mode ........................................................................................... 73
15.4.4. 8-bit PWM Mode (Buffered 8-bit PWM) ...................................................................... 74
15.4.5. 16-bit PWM Mode (Un-Buffered) ................................................................................ 75
15.4.6. Double Channel PWM Mode (Un-Buffered 8-bit PWM) .............................................. 76
16. Serial Port 0 (UART0)............................................................................... 77
16.1. Serial Port 0 Mode 0............................................................................................78
16.2. Serial Port 0 Mode 1............................................................................................80
16.3. Serial Port 0 Mode 2 and Mode 3........................................................................81
16.4. Frame Error Detection.........................................................................................81
16.5. Baud Rate Setting ...............................................................................................82
MEGAWIN
MG74PG1A08 Data Sheet
5

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MG74PG1A08 arduino
4. Pin Configurations
4.1. Package Instruction
LOGO
1 P3.6
Figure 4–1. MG74PG1A08AH Top View
17 16 15 14
VSS P1.7 P1.6 P1.5
2 P3.7
3 VDD5V
4 VDDO
5 V33
P3.0 P3.1 P3.2 P1.0
67 89
DICE
P1.4 13
P1.3 12
P1.2 11
P1.1 10
Figure 4–2. MG74PG1A08AS16 Top View
(ECKI/ICKO/nRST) P1.7 1
16 P1.6 (ECI/nSS/nINT0)
VSS 2
15 P1.5 (T1/T1CKO/STWI_SDA/PTCKO)
(STWI_SDA/DM) P3.6 3
14 P1.4 (T0/T0CKO/STWI_SCL/nINT1)
(nINT1/STWI_SCL/DP) P3.7
4 SOP16 13
P1.3 (PWM0S)
VDD 5
12 P1.2 (CEX0/VPP)
V33 6
11 P1.1 (ICP_SCL/STWI_SDA/TXD0/PWM0S/SPICLK)
(nINT1/STWI_SCL/MOSI/RXD0) P3.0 7
10 P1.0 (ICP_SDA/STWI_SCL/nINT1/RXD0/CEX0/MOSI)
(STWI_SDA/SPICLK/TXD0) P3.1 8
9 P3.2 (ICP_CMD/nINT0/MISO)
MEGAWIN
MG74PG1A08 Data Sheet
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