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Número de pieza | MLC852P | |
Descripción | 8-Bit OTP MCU | |
Fabricantes | Megawin | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MLC852P (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! MLC852P
8-bit OTP MCU with 1120 dots LCD Driver
Features
• single chip 8-bit micro-controller
• Operating voltage: 2.4V to 5.5V
• Memory :
♦ One-Time-Programmable (OTP) ROM:
64K Bytes
♦ Data RAM (stack RAM included) : 3328
Bytes (0000h ~ 0CFFh)
♦ LCD RAM : 144 Bytes
• 20 input/output pins:
♦ Dedicated I/O pins: P0[0:3]
♦ Share pin I/O:
P0[4]/SEG[69]
P0[5:7]/SEG[66:64]
P1[0:1]/UART(TX, RX)
P2[0:7]/SEG[63:56]
P3[0:1]/SEG[68:67]/(SDIO, SCLK)
• Half duplex UART function
• Build-in Megawin E-flash interface
• Dedicated SPK pin for tone/DAC
• LCD driver output:
♦ Max 70 segment × 16 common
♦ 1/16 duty 1/5 bias driving mode
♦ Build-in voltage regulator and pumper
to generate LCD voltage for LCD driver
♦ 10 level programmable frame rate from
56.7Hz to 113.8Hz
♦ 16-level adjustable VLCD from 3.5 V to
5.75 V
• One 8-bit resolution DAC output
• Programmable sample rate for
voice/melody function
• Two reloadable 8-bit timers
• Two dividers
One 14-bit divider with the clock source
from sub-oscillator to generate a 2-Hz
interrupt
One 7-bit divider with the clock source
from main oscillator
• Build-in dual oscillation circuit:
♦ Ring oscillator up to
5MHz at 3.6V – 5.5V
4MHZ at 2.4V – 3.4V
for main oscillator (Fosc)
♦ 32768Hz crystal oscillator for
sub-oscillator (Fx32)
• Build-in 8-level battery-low detector circuit
• Build-in serial interface to program the
OTP ROM.
This document contains information on a new product under development by MEGAWIN. MEGAWIN reserves the right to change or discontinue
this product without notice.
© MEGAWIN Technology Co., Ltd. 2007 All rights reserved.
2007/Otc. version 0.4
MEGAWIN
1 page Interrupt Vectors
Vector Address
4000H, 4001H
4002H, 4003H
4004H, 4005H
4006H, 4007H
4008H, 4009H
400AH, 400BH
400CH, 400DH
400EH, 400FH
4010H, 4011H
4012H, 4013H
Item
BRK
RESET
-
2HZ
TM0x
P0x
KEY
DIV1x
UART
TM1x
Priority
3
1
-
4
5
6
7
8
9
10
Properties
Int.
Ext.
-
Int.
Int.
Ext.
Ext
Int.
Int.
Int.
Memo
Software BRK interrupt vector
Initial reset
Reserved
2Hz interrupt
Timer 0 overflow interrupt
Port P0 interrupt vector
Key scan trigger
Divider 1 selected stage overflow
UART receive/transmit finished interrupt
Timer 1 overflow interrupt
There are 7 interrupt sources provided in MLC852P. The flag IRQ_EN and IRQ_ST are used to
control the interrupt events. When one flag of IRQ_ST is set to ‘1’ by hardware and the
corresponding bits of flag IRQ_EN has been set by software, an interrupt request is generated.
When an interrupt process occurs, all of the interrupts are inhibited until the CLI or STA IRQ_EN, #I
instruction is invoked. Executing the SEI instruction can also disable the interrupt requests.
2Hz
Timer 0
underflow
.
.
.
Timer 1
underflow
STA IRQ_EN, #I
S Q IRQ_ST.0
R
S Q IRQ_ST.1
R
S Q IRQ_ST.6
R
Initial Reset
CLI instruction
IRQ_EN.0
IRQ_EN.1
Enable
Interrupt
Process
Logic
Interrupt
Vector
Generator
Logic
IRQ_EN.6
4012H, 4013H
4010H, 4011H
400EH, 400FH
400CH, 400DH
400AH, 400BH
4008H, 4009H
4006H, 4007H
4002H, 4003H
4000H, 4001H
Initial Reset
STA IRQ_CLR, #I
Disable
SEI instruction
MEGAWIN
MLC852P Technical Summary
5
5 Page P0STB (Port 0 key strobe function enable/disable)
P0STB.n = 0: Disable the key strobe function of P0.n. (Default)
P0STB.n = 1: Enable the key strobe function of P0.n.
When internal pull-high register is enabled (strong or weak) and the P0STB.n is 0, the P0.n is
always pulled high. When internal pull-high register is enabled and the P0STB.n is 1, P0.n is pulled
high only for the last 30 microseconds of the low-active period of each LCD COM. This mechanism
is to reduce the interferences on LCD COM signals when P0.n and COM.m are short-circuited.
VLCD
V4
V3
V2
V1
Vss
1 COM period
P0 floating
P0 pull high enable (about 30us)
MEGAWIN
MLC852P Technical Summary
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet MLC852P.PDF ] |
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