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PDF MLC510PA Data sheet ( Hoja de datos )
| Número de pieza | MLC510PA | |
| Descripción | 8-Bit Micro-Controller | |
| Fabricantes | Megawin | |
| Logotipo |  |
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MLC510PA
8-bit micro-controller with 160 dots LCD driver
Features
Single chip 8-bit micro-controller
Operating voltage: 2.2V to 5.5V
Memory :
Program ROM : 8K Bytes
Data RAM : 128 Bytes
LCD display RAM : 20 Bytes
18 input/output pins:
Dedicated I/O pins: P0[0:3] ,P2[0:1]
Shared input or output pins:
P0[4:5]/TMin
P1[0:1]/IR
P3[0:7]/Segment
LCD driver output:
Max 32 segment 5 common
1/4 or 1/5 duty 1/3 bias driving mode
Two re-loadable 8-bit timers
Build-in Watch-Dog timer
Build-in dual oscillation circuit:
Single or dual clock operation is
selected by code option
RC type main oscillator
Crystal type sub-oscillator
Oscillator up to 4MHz @ 2.4V
and 6MHz @ 3.6V
Application Field
Timepiece, sport meter
This document contains information on a new product under development by MEGAWIN. MEGAWIN reserves the right to change or discontinue
this product without notice.
MEGAWIN Technology Co., Ltd. 2006 All rights reserved.
2007/10 version A1
MEGAWIN
1 page  
Program Counter (PC)
The 16-bit program counter register provides the addresses, which step the micro-controller
through sequential program instructions. Each time the micro-controller fetches an instruction from
program memory, the lower byte of the program counter (PCL) is placed on the low-order 8 bits of
the address bus and the higher byte of the program counter (PCH) is placed on the high-order 8 bits.
The counter is incremented each time when an instruction or data is fetched from program memory.
Stack Pointer (S)
The stack pointer is an 8-bit register, which is used to control the addressing of the variable-length
stack. The stack pointer is automatically incremented and decremented under control of the
micro-controller to perform stack manipulations under direction of either the program or interrupts
(/NMI or /IRQ). The stack allows simple implementation of nested subroutines and multiple level
interrupts. The stack pointer is initialized by the user’s software.
MEGAWIN
MLC510PA Technical Summary
5
5 Page 
Interrupt Registers
IRQ enable flag
Address
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
00C2H
IRQ_EN
-
- DIV1x TM2 TM1 P0 KEY
Program can enable or disable the ability of triggering IRQ through this register.
0: Disable (default “0” at initialization)
1: Enable
KEY: Key strobe occurs at COM scan mode
P0: Falling or Rising edge occurs at port 0.0 or P0.4 input
TM1, TM2: Timer 1 / Timer 2 underflow
DIV1x: Divider 1 selected interrupt frequency occurred
Bit 0 R W
- -
IRQ status flag (same address with IRQ_EN)
Address
00C2H
Name
IRQ_ST
Bit 7
-
Bit 6 Bit 5 Bit 4
- DIV1x TM2
Bit 3
TM1
Bit 2
P0
Bit 1
KEY
Bit 0 R W
- -
When IRQ occurs, program can read this register to know which source triggering IRQ. The
hardware would not clear the bits of IRQ_ST register automatically. If the interrupt triggering is
enabled and the interrupt event is accepted, the correspond IRQ status flag should be cleared by
firmware writing ‘1’ to the corresponding bit of IRQ_CLR register.
The controlling mechanism of DIV1x interrupt is slightly different from the other interrupt sources.
The DIV1x interrupt status is the OR-gated output of DIV1_IST bits. When the DIV1x interrupt
occurs, program must clear the DIV1x bit of IRQ_ST register and all DIV1_IST bits to enable the
next DIV1x interrupt event. For the detailed description of DIV1_IST register, please refer to the
DIV1 interrupt selector section.
IRQ clear flag
Address
00C3H
Name
IRQ_CLR
Bit 7
-
Bit 6 Bit 5 Bit 4
- DIV1x TM2
Bit 3
TM1
Bit 2
P0
Bit 1
KEY
Bit 0 R W
- -
Program can clear the interrupt event in the IRQ_ST register by writing ‘1’ into the corresponding bit
of the IRQ_CLR.
MEGAWIN
MLC510PA Technical Summary
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MLC510PA.PDF ] | |
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