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PDF AK4675 Data sheet ( Hoja de datos )

Número de pieza AK4675
Descripción Stereo CODEC
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK4675]
AK4675
Stereo CODEC with MIC/RCV/HP/SPK-AMP
GENERAL DESCRIPTION
The AK4675 is a stereo CODEC with a built-in Microphone-Amplifier, Receiver-Amplifier, cap-less
Headphone-Amplifier and stereo audio class-D Speaker-Amplifier. The AK4675 features dual PCM I/F in
addition to audio I/F that allows easy interfacing in mobile phone designs with Bluetooth I/F. The
Speaker-Amplifier includes ALC (Automatic Level Control) circuit what is able to stabilize each output
sound levels. The AK4675 is available in an 83pin BGA, utilizing less board space than competitive
offerings.
FEATURES
1. Recording Function (Stereo CODEC)
4 Stereo Input Selector x 2ch
4 Stereo Inputs (Single-ended) or 2 Stereo Input (Full-differential)
MIC Amplifier: +30dB ∼ −12dB, 3dB step
Digital ALC (Automatic Level Control): +36dB ∼ −54dB, 0.375dB Step, Mute
Wind-noise Reduction Filter
Stereo Separation Emphasis
5-band Programmable Notch Filter
Audio Interface Format: 16bit MSB justified, I2S, DSP Mode
2. Playback Function (Stereo CODEC)
Digital Volume (+12dB ∼ −115.0dB, 0.5dB Step, Mute)
Digital ALC (Automatic Level Control): +36dB ∼ −54dB, 0.375dB Step, Mute
Stereo Separation Emphasis
5-band EQ
Stereo Line Output
Mono Receiver-Amp
- BTL Output
- Output Power: 30mW@32Ω (AVDD=3.3V)
Stereo Cap-less Headphone Amplifier
- Mono / Stereo Mode
- Output Power: 64mW x 2ch @ 16Ω, SVDDA=3.3V, THD+N = –40dB
- THD+N: -58dB @ 16Ω, Po=30mW, SVDDA=3.3V
- Output Noise Level: 24μVrms
- Outputs Volume: +12dB to –50dB, 2dB Step
- Pop Noise Free at Power-ON/OFF and Mute
Class-D Speaker Amplifier
- BTL output
- Output Power: 1.6W @ 8Ω, SVDDA=5.0V
0.8W @ 8Ω, SVDDA=3.6V
- THD+N: –65dB @8Ω, Po=0.25W, SVDDA=3.6V
- Output Noise Level: 71μVrms
- ALC (Automatic Level Control) Circuit
- Pop Noise Free at Power-ON/OFF and Mute
- External filter-less
- Short Protection circuit
Thermal Shutdown / Short protection circuit
Analog Mixing: 4 Stereo Input
Audio Interface Format: 16bit MSB justified, 16bit LSB justified, 16-24bit I2S, DSP
Mode
3. Dual PCM I/F for Baseband & Bluetooth Interface
MS0963-E-00
-1-
2008/05

1 page




AK4675 pdf
Ordering Guide
AK4675EG
AKD4675
30 +85°C
83pin BGA (0.5mm pitch)
Evaluation board for AK4675
Pin Layout
10
9
8
7
6 AK4675
5 Top View
4
3
2
1
A BC D EFG H J K
[AK4675]
10
TEST
HPR
VCOM VCOC
HPL PVDDA VSS3A
CP
SDTIA GPO2
9
AVDD
ROUT1
/RCN
VBATO VCOCBT
PVEE
SDTOA SYNCA
CN
PDNA BICKA
8
VSS1
ROUT3
/LON
VCOMA
RIN4
/IN4
PVDD
VSS2 TVDD2 TVDDA VSS4 MCKIA
7
VBATIN
LOUT3
/LOP
LIN3
/IN3+
TEST6 DVDD
SDA
6
LOUT1
/RCP
LIN4
/IN4+
RIN1A
5
RIN3
/IN3
RIN2
/IN2
SAIN2
Top View
MCKO
MCKI
NC
TEST5
SCL
BICK
4
LIN2
/IN2+
SAIN3 SAIN1
LRCK
PDN VSS1A
3
LIN1
/IN1+
RIN1
/IN1
SAVDD SDTOB SDTO BICKB NC TEST3 AVDDA
2
LIN1A MPWR ROUT2S NC
VSS3
SPN SYNCB SDTIB TEST4 SPIN
1
MDT LOUT2S NC
SVDDA VSS2A TVDD3 SPP
TEST2 SDTI
GPO1
ABCDE FGH J K
MS0963-E-00
-5-
2008/05

5 Page





AK4675 arduino
[AK4675]
RECOMMENDED OPERATING CONDITIONS
(VSS1=VSS2=VSS3=VSS4=VSS1A=VSS2A=VSS3A=0V; Note 2)
Parameter
Symbol
min typ max Units
Power Supplies CODEC Analog
AVDD
2.2 3.3 3.6 V
(Note 16) PLLBT
PVDD
2.2 3.3 3.6 V
10bit SAR ADC
SAVDD
2.2 3.3 3.6 V
CODEC Digital
DVDD
1.6 3.3 3.6 V
CODEC Digital I/O 2
TVDD2
1.6 3.3 3.6 V
CODEC Digital I/O 3
TVDD3
1.6 3.3 3.6 V
HP/SPK-Amp Analog
AVDDA
2.6 3.3 3.6 V
HP/SPK-Amp Digital I/F
Speaker-Amp & Headphone-Amp
TVDDA
SVDDA
1.6 3.3 3.6 V
3.0 3.6 5.5 V
Charge Pump
PVDDA
2.6 3.3 3.6 V
Difference 1
Difference 2
Difference 3
Difference 4
AVDDPVDD
0.1
0
+0.1 V
PVDDA–AVDDA 0.3 0 +0.3 V
SVDDA–AVDDA 0.3
-
-V
DVDD–TVDDA 0.3 0 +0.3 V
Note 2. All voltages with respect to ground.
Note 16. TVDDA must be connected to DVDD. The power-up sequence between AVDD, PVDD, SAVDD, DVDD,
TVDD2, TVDD3, AVDDA, TVDDA, SVDDA and PVDDA is not critical. However, the PDN and PDNA pin
must be held to “L” until all power supply pins are supplied. After all power supplies are filled, PDN and PDNA
pins should be set to “H”.
* The AK4675 supports the following two cases of partial power ON/OFF. In these cases, PDNA pin should be “L” and
all power management bits (PMVCM, PMMP, PMMICL, PMMICR, PMADL, PMADR, PMDAL, PMDAR, PMPLL,
PMLOOPL, PMLOOPR, PMAINL1, PMAINR1, PMAINL2, PMAINR2, PMAINL3, PMAINR3, PMAINL4,
PMAINR4, PMLO1, PMRO1, PMLO2S, PMRO2S, PMLO3, PMRO3, PMSRA, PMSRB, PMPCM, and PMSAD)
should be OFF or PDN and PDNA pins should be “L”.
1. DVDD=TVDDA=SVDDA=ON, AVDD=PVDD=SAVDD=TVDD2=TVDD3=AVDDA=PVDDA=OFF
2. DVDD=TVDDA=ON, AVDD=PVDD=SAVDD=TVDD2=TVDD3=AVDDA=PVDDA=SVDDA=OFF
When the power state is changed from OFF to ON in the above cases, the PDN and PDNA pins should be set to “H” after
all power supply pins are supplied.
When DVDD and TVDDA are powered OFF, AVDD, PVDD, SAVDD, TVDD2, TVDD3, AVDDA, TVDDA, SVDDA
or PVDDA must be powered OFF. When only DVDD and TVDDA are OFF, leak current of 10mA to 100mA may occur.
* AKEMD assumes no responsibility for the usage beyond the conditions in this datasheet.
MS0963-E-00
- 11 -
2008/05

11 Page







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