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PDF AK4950 Data sheet ( Hoja de datos )
| Número de pieza | AK4950 | |
| Descripción | 24bit Stereo CODEC | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK4950]
AK4950
24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP
GENERAL DESCRIPTION
The AK4950 is a 24bit stereo CODEC with a microphone, speaker and headphone amplifiers. The input
circuits include a microphone amplifier and the output circuits include a speaker amplifier. It is suitable for
portable application with recording/playback function. The integrated charge pump generates an internal
negative power supply rail and removes the output coupling capacitor. A one channel composite In/Out
video amplifier is also integrated. Digital sound processing is provided by the internal DSP. The AK4950 is
available in a small 32pin QFN (4mm x 4mm, 0.4mm pitch), saving more board space.
FEATURES
1. Recording Functions
• Stereo Single-ended input with two Selectors
• MIC Amplifier (+24dB/+21dB/+18dB/+16dB/+14dB/+11dB/+8dB/+5dB/0dB)
• Digital ALC (Automatic Level Control)
(Setting Range: +35.625dB ∼ −54dB, 0.375dB Step)
• ADC Performance: S/(N+D): 83dB, DR, S/N: 88dB (MIC-Amp=+18dB)
S/(N+D): 85dB, DR, S/N: 96dB (MIC-Amp=0dB)
• MIC Sensitivity Compensation
• Wind-noise Reduction Filter
• 4 Band Notch Filter
• Stereo Separation Emphasis Circuit
• Digital MIC Interface
2. Playback Functions
• Digital De-emphasis Filter (tc=50/15μs, fs=32kHz, 44.1kHz, 48kHz)
• Digital ALC (Automatic Level Control)
(Setting Range: +35.625dB ~ −54dB, 0.375dB Step)
• Digital Volume Control (+12dB ~ −78dB, 0.375dB Step)
• Stereo Separation Emphasis Circuit
• Stereo Line Output
- S/(N+D): 83dB, S/N: 92dB
• Mono Mixing Output
• Mono Speaker-Amplifier
- SPK-Amp Performance: S/(N+D): 75dB@150mW, 70dB@250mW,
S/N: 95dB
- Thermal Shut-down
- BTL Output
- Output Power: 400mW@8Ω (SVDD=3.3V)
• Analog Mixing: Mono Input
3. Power Management
4. Master Clock:
(1) PLL Mode
• Frequencies: 11.2896MHz, 12MHz, 13.5MHz, 24MHz, 25MHz, 27MHz (MCKI pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
• Frequencies: 512fs or 1024fs (MCKI pin)
MS1320-E-00
-1-
2011/10
1 page  
[AK4950]
PIN/FUNCTION
No Pin Name
I/O Function
1
ROUT
MIN
O Rch Analog Output Pin (PMBP bit = “0”)
I Mono Analog Signal Input Pin (PMBP bit = “1”)
2 LOUT
3
LIN1
DMDAT
O Lch Analog Output Pin
I Lch Analog Input Line Input 1Pin
I Digital Microphone Data Input Pin
(DMIC bit = “0”)
(DMIC bit = “1”)
4
RIN1
DMCLK
I Rch Analog Input 1 Pin
O Digital Microphone Clock pin
(DMIC bit = “0”)
(DMIC bit = “1”)
5 MPWR
6 LIN2
O MIC Power Supply Pin for Microphone
I Lch Analog Input 2 pin
7 RIN2
I Rch Analog Input 2 Pin
8 PDN
Power-down & Reset
I When “L”, the AK4950 is in power-down mode and is held in reset.
The AK4950 must be always reset upon power-up.
9
CSN
SDA
I Chip Select Pin
I/O Control Data Input/Output Pin
(I2C pin = “L”)
(I2C pin = “H”)
10
CCLK
SCL
I Control Data Clock Pin
I Control Data Clock Pin
(I2C pin = “L”)
(I2C pin = “H”)
11
CDTIO
CAD0
I/O Control Data Input/Output Pin
I Chip Address Select Pin
(I2C pin = “L”)
(I2C pin = “H”)
12 SDTI
I Audio Serial Data Input Pin
13 SDTO
14 LRCK
O Audio Serial Data Output Pin
I/O Input/Output Channel Clock Pin
15 BICK
16 TVDD
I/O Audio Serial Data Clock Pin
- Digital I/F Power Supply Pin
17 VSS2
- Ground 2 Pin
18 MCKI
I External Master Clock Input Pin
19 MCKO
O Master Clock Output Pin
20 REGFILB
LDO Voltage Output pin for Digital Logic (typ 1.8V)
O This pin must be connected to the VSS1 pin with a 1.0μF capacitor (±50%
including tolerance and temperature allowance) in series.
21 REGFILA
22 I2C
LDO Voltage Output pin for Analog Logic (typ 2.3V)
O This pin must be connected to the VSS1 pin with a 2.2μF capacitor (±50%
including tolerance and temperature allowance) in series.
I
Control Mode Select Pin “H”: I2C Bus, “L”: 3-wire mode
The input circuit of the I2C pin is operated by AVDD.
23 SPP
O Speaker Amp Positive Output Pin
24 SPN
O Speaker Amp Negative Output Pin
25 VSS3
- Ground 3 Pin
26 AVDD
-
Analog Power Supply Pin
This pin must be connected to VSS4 with a 0.1μF ceramic capacitor in series.
27 VCOM
O
Common Voltage Output Pin
Bias voltage of ADC inputs and DAC outputs.
28 VSS1
- Ground 1 Pin
29 VOUT
O Composite Video Output Pin
30 VSS4
31 PVEE
- Ground 4 Pin
O
Negative Voltage Output Pin for Video Output
This pin must be connected to VSS4 with a 2.2μF ceramic capacitor in series.
32 VIN
I Composite Video Input Pin
Note 1. All input pins except analog input pins (MIN, LIN1, RIN1, LIN2, RIN2, VIN) must not be allowed to float.
MS1320-E-00
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2011/10
5 Page 
[AK4950]
Parameter
min typ max Unit
Power Supplies:
Power Up (PDN pin = “H”)
All Circuit Power-up (Note 18)
AVDD+TVDD
- 22.2 33 mA
MIC + ADC (Note 15)
AVDD+TVDD
- 5.5 - mA
DAC + Lineout (Note 16)
AVDD+TVDD
- 5.2 - mA
DAC + SPK-Amp
AVDD+TVDD
- 6 - mA
Video Block (Note 22)
AVDD
- 12.7 19 mA
Power Down (PDN pin = “L”) (Note 17)
AVDD+TVDD
- 1 5 μA
Note 18. When PMADL=PMADR=PMDAC=PMPFIL =PMLO=PMSPK=PMPLL=MCKO=PMBP=PMMP=M/S=
PMV bits = “1”, SPK-amp No load, and black signal is only input to the VIN pin in PLL Master Mode
(MCKI=12MHz). In this case, the output current of the MPWR pin is 0mA. AVDD=20.7mA (typ),
TVDD=1.5mA (typ).
Note 19. When PMADL = PMADR bits= “1” and PMPFIL bit = “1” in EXT Slave Mode (PMPLL=M/S=MCKO bits
=“0”).
Note 20. When PMDAC = PMLO bits= “1” and PMPFIL bit = “1” in EXT Slave Mode (PMPLL=M/S=MCKO bits
=“0”).
Note 21. When PMDAC = PMSPK =SPPSN bits = “1”, PMPFIL bit = “1”, and No load at SPK-amp in EXT Slave Mode
(PMPLL=M/S=MCKO bits =“0”).
Note 22. When PMV=PMCP bits = “1”, No-load, and the black signal is only input to the VIN pin.
Note 23. All digital input pins are fixed to TVDD or VSS2.
MS1320-E-00
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2011/10
11 Page | ||
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| PDF Descargar | [ Datasheet AK4950.PDF ] | |
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