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PDF AD7293 Data sheet ( Hoja de datos )
| Número de pieza | AD7293 | |
| Descripción | 12-Bit Power Amplifier Current Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
12-Bit Power Amplifier Current Controller with
ADC, DACs, Temperature and Current Sensors
AD7293
FEATURES
4 closed-loop power amplifier (PA) drain current controllers
Built-in PA protection, sequencing, and alert features
Compatible with both depletion mode and enhancement mode
power amplifiers
Highly integrated
4 uncommitted 12-bit analog-to-digital converter (ADC) inputs
±0.5 LSB typical integral nonlinearity (INL)
Eight 12-bit voltage digital-to-analog converters (DACs)
1.3 μs maximum settling
4 high-side current sense amplifiers, ±0.1% gain error
2 external temperature sensor inputs, ±1.1°C accuracy
Internal temperature sensor, ±1.25°C accuracy
2.5 V on-chip reference
Flexible monitoring and control ranges
ADC input ranges: 0 V to 1.25 V, 0 V to 2.5 V, and 0 V to 5 V
Bipolar DAC ranges: 0 V to +5 V, −4 V to +1 V, and −5 V to 0 V
Bipolar DAC reset and clamping relative to VCLAMPx voltage
Unipolar DAC ranges: 0 V to 5 V, 2.5 V to 7.5 V, and 5 V to 10 V
Current sense gain: 6.25, 12.5, 25, 50, 100, and more
Adjustable closed-loop setpoint ramp time
High-side voltage current sensing
4 current sense inputs
4 V to AVSS + 60 V, ±200 mV input range
Small package and flexible interface
Serial port interface (SPI) with VDRIVE supporting 1.8 V, 3 V, and
5 V interfaces
56-lead LFCSP
Temperature range: −40°C to +125°C
APPLICATIONS
GaN and GaAs power amplifier monitoring and controls
Base station power amplifiers
General-purpose system monitoring and controls
GENERAL DESCRIPTION
The AD7293 is a PA drain current controller containing
functionality for general-purpose monitoring and control of
current, voltage, and temperature, integrated into a single chip
solution with an SPI-compatible interface.
The device features a 4-channel, 12-bit successive approximation
register (SAR) ADC, eight 12-bit DACs (four bipolar and four
unipolar with output ranges that can be configured to shut
down under external pin control), a ±1.25°C accurate internal
temperature sensor, and eight general-purpose input/output
(GPIO) pins.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
PRECISION
2.5V
REFERENCE
×
1
2
1.25V
2.5V
BIPOLAR
DAC
PMOS
CONTROL
AD7293
–
+Σ
PAVDD
PA_ON
MUX
12-BIT
SAR ADC
ALERT
AND LIMIT
REGISTERS
0V TO +5V
–4V TO +1V
–5V TO 0V
UNIPOLAR
D0+ DAC
0V TO 5V
2.5V TO 7.5V
D0– 5V TO 10V
D1+
D1–
RESET
SPI
LOGIC INTERFACE
CONTROL
LOGIC
DIGITAL
LDAC AND
INPUT/OUTPUT CLAMP CONTROL
Figure 1.
The device also includes limit registers for alert functions and four
high-side current sense amplifiers to measure current across
external shunt resistors. These amplifiers can be optionally set to
operate as part of four independent closed-loop drain current
controllers.
A high accuracy 2.5 V internal reference is provided to drive the
DACs and the ADC. The 12-bit ADC monitors and digitizes the
internal temperature sensor, and two inputs are included for the
external diode temperature sensors.
Note that throughout this data sheet, multifunction pins, such
as GPIO4/ALERT1, are referred to either by the entire pin name
or by a single function of the pin, for example, ALERT1, when
only that function is relevant.
PRODUCT HIGHLIGHTS
1. Four independent closed-loop drain current controllers.
2. Built-in monitoring, sequencing, and alert features.
3. Compatible with both depletion mode and enhancement
mode power amplifiers.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD7293
Data Sheet
REFADC VREFOUT
VREFIN
BI-VOUT0MON
BI-VOUT1MON
BI-VOUT2MON
BI-VOUT3MON
DACVDD-BI
DACVDD-UNI
AVSS
AVDD
VIN0
VIN1
VIN2
VIN3
D0+
1
MUX
D0–
D1+
1
PRECISION
2.5V
REFERENCE
×
1
2
1.25V
2.5V
BIPOLAR
DAC
AD7293
PMOS
CONTROL
CURRENT
SENSOR
CURRENT
SENSOR
CONTROL
LOGIC
BIPOLAR
DAC
BIPOLAR
DAC
BIPOLAR
DAC
CURRENT
SENSOR
CURRENT
SENSOR
UNIPOLAR
DAC
D1–
UNIPOLAR
DAC
VDRIVE
DVDD
ALERT AND
LIMIT
REGISTERS
UNIPOLAR
DAC
UNIPOLAR
DAC
RESET
SPI
LOGIC INTERFACE
DIGITAL
LDAC AND
INPUT/OUTPUT CLAMP CONTROL
PAVDD
PA_ON
RS0+
RS0–
BI-VOUT0
RS1+
RS1–
0V TO +5V
–4V TO +1V
–5V TO 0V
BI-VOUT1
RS2+
RS2–
BI-VOUT2
RS3+
RS3–
BI-VOUT3
0V TO 5V
UNI-VOUT0 2.5V TO 7.5V
5V TO 10V
UNI-VOUT1
UNI-VOUT2
UNI-VOUT3
VCLAMP0
VCLAMP1
Figure 3. Open-Loop Functional Block Diagram
Rev. A | Page 4 of 77
5 Page 
AD7293
Data Sheet
TIMING CHARACTERISTICS
SPI Serial Interface
AVDD, DVDD, DACVDD-BI = 4.5 V to 5.5 V (connect AVDD and DACVDD-BI to the same potential), DACVDD-UNI = 2.7 V to 16 V, AVSS = 0 V,
RSx+ = AVDD to 55 V, AGND = DGND = 0 V, VREFIN = 2.5 V internal or external, VDRIVE = 1.7 V to 5.5 V, TA = −40°C to +125°C, unless
otherwise noted.
Table 7.
Parameter
fSCLK
t1
t2
t3
t4
t5
t62
t7
t8
t93
t10
t11
t12
t13
t14
Description
Frequency of serial read clock1
SCLK period
SCLK low
SCLK high
CS falling edge to SCLK rising edge
DIN setup time to SCLK rising edge
DIN hold time after SCLK rising edge
Last SCLK rising edge to CS rising edge
CS high
CS rising edge to next SCLK rising edge
SCLK falling edge to CS falling edge
SCLK falling edge to output data valid delay time from
high impedance4
SCLK falling edge to output data valid delay time4
Last SCLK falling edge to DOUT high impedance4
CS rising edge to DOUT high impedance4
Limit at TMIN/TMAX
VDRIVE = 1.7 V to 2.7 V VDRIVE = 2.7 V to 5.5 V
8 15
150 66.67
40 26
40 26
55
10 10
10 10
55
12 10
11
11
60 30
60 30
20 20
25 15
Unit
MHz max
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns min
ns min
ns min
ns max
ns max
ns typ
ns max
1 DOUT loaded with 10 pF for DOUT timing specifications.
2 Time required for the output to cross 0.2 × VDRIVE and 0.8 × VDRIVE when VDRIVE < 2.7 V; time required for the output to cross 0.3 × VDRIVE and 0.7 × VDRIVE when 2.7 ≤ VDRIVE ≤5.5 V.
3 Guaranteed by design and characterization; not production tested.
4 MISO speed set to maximum in the general register.
Asynchronous Inputs
AVDD, DVDD, DACVDD-BI = 4.5 V to 5.5 V (connect AVDD and DACVDD-BI to the same potential), DACVDD-UNI = 2.7 V to 16 V, AVSS = 0 V,
RSx+ = AVDD to 55 V, AGND = DGND = 0 V, VREFIN = 2.5 V internal or external, VDRIVE = 1.7 V to 5.5 V, TA = −40°C to +125°C, unless
otherwise noted.
Table 8.
Parameter
t151
t16
t17
t18
Description
Minimum LDAC pulse width
Minimum CONVST pulse width
Minimum IS BLANK pulse width
Minimum RESET pulse width
Limit at TMIN/TMAX
VDRIVE = 1.7 V to 2.7 V
VDRIVE = 2.7 V to 5.5 V
90 90
90 90
90 90
90 90
Unit
ns min
ns min
ns min
ns min
1 Guaranteed by design and characterization; not production tested.
Rev. A | Page 10 of 77
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7293.PDF ] | |
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