PDF ADDI7100 Data sheet ( Hoja de datos )

Número de pieza	ADDI7100
Descripción	CCD Signal Processor
Fabricantes	Analog Devices
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No Preview Available ! Data Sheet FEATURES Pin-compatible upgrade for the AD9945 45 MHz correlated double sampler (CDS) with variable gain 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) Low noise optical black clamp circuit Preblanking function 12-bit, 45 MHz ADC No missing codes guaranteed 3-wire serial digital interface 3 V single-supply operation Space-saving, 32-lead, 5 mm × 5 mm LFCSP APPLICATIONS Digital still cameras Digital video camcorders PC cameras Portable CCD imaging devices CCTV cameras Complete, 12-Bit, 45 MHz CCD Signal Processor ADDI7100 GENERAL DESCRIPTION The ADDI7100 is a complete analog signal processor for charge- coupled device (CCD) applications. It features a 45 MHz, single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. The signal chain for the ADDI7100 consists of a correlated double sampler (CDS), a digitally controlled variable gain amplifier (VGA), a black level clamp, and a 12-bit ADC. The internal registers are programmed through a 3-wire serial digital interface. Programmable features include gain adjustment, black level adjustment, input clock polarity, and power-down modes. The ADDI7100 operates from a single 3 V power supply, typically dissipates 125 mW, and is packaged in a space-saving, 32-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM REFT REFB PBLK ADDI7100 −3dB, 0dB, +3dB, +6dB CCDIN CDS 6dB TO 42dB VGA BAND GAP REFERENCE 12-BIT ADC 12 DRVDD DRVSS DOUT D0 TO D11 AVDD AVSS CLP 10 CLPOB CONTROL REGISTERS DIGITAL INTERFACE INTERNAL TIMING DVDD DVSS VD SL SCK SDATA Figure 1. SHP SHD DATACLK Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2008–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com 1 page ADDI7100 Data Sheet SYSTEM SPECIFICATIONS TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 45 MHz, unless otherwise noted. Table 3. Parameter CDS Allowable CCD Reset Transient CDS Gain Accuracy −3 dB CDS Gain 0 dB CDS Gain +3 dB CDS Gain +6 dB CDS Gain Maximum Input Range Before Saturation 0 dB CDS Gain −3 dB CDS Gain +6 dB CDS Gain Maximum CCD Black Pixel Amplitude 0 dB CDS Gain +6 dB CDS Gain VARIABLE GAIN AMPLIFIER (VGA) Gain Control Resolution Gain Monotonicity Gain Range Minimum Gain (VGA Code 15) Maximum Gain (VGA Code 1023) BLACK LEVEL CLAMP MEASURED AT ADC OUTPUT Clamp Level Resolution Clamp Level Minimum Clamp Level (Code 0) Maximum Clamp Level (Code 1023) ADC Resolution Differential Nonlinearity (DNL) No Missing Codes Full-Scale Input Voltage VOLTAGE REFERENCE Reference Top Voltage (REFT) Reference Bottom Voltage (REFB) SYSTEM PERFORMANCE Gain Accuracy Low Gain (VGA Code 15) Maximum Gain (VGA Code 1023) Peak Nonlinearity, 1 V Input Signal Total Output Noise Power Supply Rejection (PSR) Test Conditions/Comments Input characteristics definition1 VGA gain = 6 dB (Code 15, default value) Default setting Default setting Positive offset definition1 Default setting See Figure 13 for VGA curve See Variable Gain Amplifier (VGA) section for VGA gain equation Measured at ADC output Specifications include entire signal chain 6 dB total gain (default CDS, VGA) 6 dB total gain (default CDS, VGA) AC grounded input, 6 dB total gain Measured with step change on supply 1 Input signal characteristics are defined as shown in Figure 2. Min −2.45 5.40 8.65 11.10 −100 −50 12 −1.0 5.4 41.4 Typ Max 0.5 1.2 −2.95 5.90 9.15 11.60 −3.45 6.40 9.65 12.10 1.0 1.4 0.5 +200 +100 1024 Guaranteed 6.0 42.0 2048 0 511 ±0.5 Guaranteed 2.0 2.0 1.0 5.9 6.4 41.9 42.4 0.1 0.8 45 Unit V dB dB dB dB V p-p V p-p V p-p mV mV Steps dB dB Steps LSB LSB Bits LSB V V V dB dB % LSB rms dB 500mV TYP RESET TRANSIENT 100mV TYP OPTICAL BLACK PIXEL 1V TYP INPUT SIGNAL RANGE Figure 2. Rev. D \| Page 4 of 20 5 Page ADDI7100 EQUIVALENT INPUT CIRCUITS DVDD INPUT 330Ω DVSS Figure 9. Digital Inputs SHP, SHD, DATACLK, CLPOB, PBLK, SCK, SL, SDATA, and VD DATA DVDD DRVDD THREE- STATE D[0:11] DVSS DRVSS Figure 10. Data Outputs Data Sheet AVDD 60Ω AVSS AVSS Figure 11. CCDIN (Pin 22) Rev. D \| Page 10 of 20 11 Page

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