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Intersil - Triple-Rate (SD/HD/3G) SDI Transmitter

Numéro de référence TW6872
Description Triple-Rate (SD/HD/3G) SDI Transmitter
Fabricant Intersil 
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TW6872 fiche technique
Triple-Rate (SD/HD/3G) SDI Transmitter with VC-2
Encoder and Audio Decoder
TW6872
The TW6872 is a triple-rate (SD/HD/3G) SDI transmitter. It
receives parallel BT.656/BT.1120/ASI video data from a
CMOS sensor/ISP chip. It also receives analog audio, or serial
digital audio. The TW6872 serializes the video and audio into
an SDI stream and transmits it to an SDI receiver via its
integrated cable driver.
In addition to the standard SDI format with uncompressed raw
video data, TW6872 can optionally compress video with a
visually lossless VC-2 compression algorithm to send the video
formats normally running at HD rate (1.5Gbps) on the cable at
SD rate (270Mbps), and therefore achieve longer cable reach.
Together, the TW6872 and Intersil’s TW6874 SDI receiver
provide a complete end-to-end SDI link solution and can
operate with or without VC-2 compression. Integrated
audio/video test patterns and PRBS checker ease system
design and implementation.
The TW6872 is available in a 76 Ld QFN. It is specified for
operation over the -40°C to +85°C ambient temperature
range and operates on two power supplies: 1V and 3.3V. A
single 27MHz crystal is used for all supported audio/video
operating modes.
Applications
• SD/HD/3G-SDI Camera
Features
• Triple-rate (SD/HD/3G) SDI transmitter for Standard
Definition (SD) and High Definition (HD), and 3G 10-bit
component video
• Encoding SDI standard of ITU-R BT.656/SMPTE 259M
Level C, ITU-R BT.1120/SMPTE ST 292, SMPTE 424M 10-bit
parallel component video inputs into 10-bit serial video
output
• BT.656/BT.1120 interface for CMOS sensor/ISP chip
• Asynchronous Serial Interface (ASI) for IEC 13818-1
compliant transport streams
• Integrated 75Ω cable driver with pre/de-emphasis
• Integrated VC-2 encoder allows transmission of HD video
over SD transmission lengths
• Analog audio and I2S serial audio input interfaces over
ancillary field
• Digital audio with PCM encoding for embedding audio
samples into the audio ancillary field of SDI stream
• Single 27MHz clock/crystal input
• Optional clock output for use as the ISP chip’s clock input to
enhance overall jitter
• PRBS7/23 and video/audio pattern generator
• I2C for external micro-controller interface
• Low power consumption
• Small footprint LTZ-QFN76L (9mm x9mm) package
• Pb-free (RoHS compliant)
d
u
m
m
y
May 23, 2014
FN8616.0
1.0V 3.3V
CMOS
SENSOR
CLK
DATA
CLKO
ISP
21
VD
3 I2S
4.7k
4.7k
2.2µF
AIN0
2.2µF
AIN1
TW6872
HOST
PROCESSOR
IRQ
I2C
SDO
SDO
XTI
XTO
RSET
3.3V
75 
3.3V
75 
22pF
0 
open*
0 
open*
1µF
1µF
75
75
COAX
TW6874S
DI RX
d
u
m
m
y
27MHz
22pF
1.6k 
*Final RLN values pending optimization.
Place holder for inductor recommended.
AINN
2.2µF
FIGURE 1. TW6872 TYPICAL APPLICATION
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
I2C Bus™ is a trademark owned by NXP Semiconductors Netherlands, B.V. All other trademarks mentioned are the property of their respective owners.

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