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Numéro de référence | HS-303BEH | ||
Description | Radiation Hardened CMOS Dual SPDT Analog Switch | ||
Fabricant | Intersil | ||
Logo | |||
DATASHEET
Radiation Hardened CMOS Dual SPDT Analog Switch
HS-303ARH, HS-303AEH, HS-303BRH, HS-303BEH
The HS-303ARH, HS-303AEH, HS-303BRH, HS-303BEH analog
switches are monolithic devices fabricated using Intersil’s
dielectrically isolated Radiation Hardened Silicon Gate (RSG)
process technology to insure latch-up free operation. They are
pinout compatible and functionally equivalent to the
HS-303RH, but offer improved 300kRAD(Si) total dose
capability. These switches offers low-resistance switching
performance for analog voltages up to the supply rails.
ON-resistance is low and stays reasonably constant over the
full range of operating voltage and current. ON-resistance also
stays reasonably constant when exposed to radiation.
Break-before-make switching is controlled by 5V digital inputs.
The HS-303ARH, HS-303AEH should be operated with nominal
±15V supplies, while the HS-303BRH, HS-303BEH should be
operated with nominal ±12V supplies.
Specifications
Specifications for Rad Hard QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The SMD
number listed in the following must be used when ordering.
Features
• QML, per MIL-PRF-38535
• Radiation performance
- Total dose: 3x105 rad(Si)
- SEE: For LET = 60MeV-mg/cm2 at 60° incident angle,
<150pC charge transferred to the output of an off switch
• No latch-up, dielectrically isolated device islands
• Pinout and functionally compatible with Intersil HS-303RH
and HI-303 series analog switches
• Analog signal range equal to the supply voltage range
• Low leakage . . . . . . . . . . . . . . . . . . . . . 100nA (max, post-rad)
• Low rON . . . . . . . . . . . . . . . . . . . . . . . . . . . 70Ω (max, post-rad)
• Low standby supply current . . . . . . . . . . . . . +150µA/-100µA
(max, post-rad)
Detailed Electrical Specifications for the HS-303ARH,
HS-303AEH, HS-303BRH, HS-303BEH are contained in
SMD 5962-95813.
Functional Diagram
IN N P
D
LOGIC
0
1
TRUTH TABLE
SW1 AND SW2
OFF
ON
SW3 AND SW4
ON
OFF
Pin Configurations
HS1-303ARH, HS-303BRH
(SBDIP), CDIP2-T14
TOP VIEW
NC 1
S3 2
D3 3
D1 4
S1 5
IN1 6
GND 7
14 V+
13 S4
12 D4
11 D2
10 S2
9 IN2
8 V-
HS-303ARH, HS-303AEH, HS-303BRH, HS-303BEH
(FLATPACK) CDFP3-F14
TOP VIEW
NC
S3
D3
D1
S1
IN1
GND
1
2
3
4
5
6
7
14 V+
13
S4
12 D4
11 D2
10 S2
9
IN2
8
V-
March 4, 2015
FN6411.3
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2006, 2008, 2012, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
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Pages | Pages 5 | ||
Télécharger | [ HS-303BEH ] |
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