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MBM29F040A-70 fiches techniques PDF

Fujitsu - FLASH MEMORY 4M 512K x 8 BIT

Numéro de référence MBM29F040A-70
Description FLASH MEMORY 4M 512K x 8 BIT
Fabricant Fujitsu 
Logo Fujitsu 





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MBM29F040A-70 fiche technique
FUJITSU SEMICONDUCTOR
DATA SHEET
FLASH MEMORY
CMOS
4M (512K × 8) BIT
MBM29F040A - 70/-90/-12
DS05–20810–3E
s DISTINCTIVE CHARACTERISTICS
• Single 5.0 V read, write and erase
Minimizes system level power requirements
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with JEDEC-standard byte-wide pinouts
32-pin PLCC (Package suffix: PD)
32-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
Note: If there are special requirements not specified above (such as DIP package), please contact Fujitsu
sales office.
• Minimum 100,000 write/erase cycles
• High performance
70 ns maximum access time
• Sector erase architecture
8 equal size sectors of 64K bytes each
Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Low power consumption
20 mA typical active read current
30 mA typical write/erase current
25 µA typical standby current
• Low Vcc write inhibit 3.2 V
• Sector protection
Hardware method disables any combination of sectors from write or erase operations
• Erase Suspend/Resume
Suspends the erase operation to allow a read data in another sector within the same device
Embedded Eraseand Embedded Programare trademarks of Advanced Micro Devices, Inc.

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