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PDF MBM29LV001BC-55 Data sheet ( Hoja de datos )
| Número de pieza | MBM29LV001BC-55 | |
| Descripción | 1M (128K x 8) BIT FLASH MEMORY | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MBM29LV001BC-55 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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FUJITSU SEMICONDUCTOR
DATA SHEET
FLASH MEMORY
CMOS
1M (128K × 8) BIT
DS05-20861-3E
MBM29LV001TC-55/-70/MBM29LV001BC-55/-70
s FEATURES
• Single 3.0 V read, program, and erase
Minimizes system level power requirements
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
32-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
32-pin PLCC (Package suffix: PD)
• Minimum 100,000 program/erase cycles
• High performance
55 ns maximum access time
• Sector erase architecture
One 8K byte, two 4K bytes, and seven 16K bytes
Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
T = Top sector
B = Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Hardware RESET pin
Resets internal state machine to the read mode
• Automatic sleep mode
When addresses remain stable, automatically switch themselves to low power mode
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
Suspends the erase operation to allow a read data in another sector within the same device
• Sector protection
Hardware method disables any combination of sectors from program or erase operations
• Sector Protection Set function by Extended sector protection command
• Temporary sector unprotection
Temporary sector unprotection via the RESET pin
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
1 page  
MBM29LV001TC-55/-70/MBM29LV001BC-55/-70
s PRODUCT LINE UP
Part No.
Ordering Part No.
VCC = 3.3 V
+0.3 V
–0.3 V
VCC = 3.0 V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
s BLOCK DIAGRAM
MBM29LV001TC/MBM29LV001BC
-55 —
— -70
55 70
55 70
25 30
VCC
VSS
WE
RESET
CE
OE
DQ 0 to DQ 7
Erase Voltage
Generator
Input/Output
Buffers
State
Control
Command
Register
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB Data Latch
A0 to A16
STB Y-Decoder
Low VCC Detector
Timer for
Program/Erase
Address
Latch
X-Decoder
Y-Gating
Cell Matrix
5
5 Page 
MBM29LV001TC-55/-70/MBM29LV001BC-55/-70
Table 4 Sector Address Tables (MBM29LV001TC)
Sector
Address
A16
A15
A14
A13
A12
Address Range
SA0 0 0 0 X X 00000H to 03FFFH
SA1 0 0 1 X X 04000H to 07FFFH
SA2 0 1 0 X X 08000H to 0BFFFH
SA3 0 1 1 X X 0C000H to 0FFFFH
SA4 1 0 0 X X 10000H to 13FFFH
SA5 1 0 1 X X 14000H to 17FFFH
SA6 1 1 0 X X 18000H to 1BFFFH
SA7 1 1 1 0 0 1C000H to 1CFFFH
SA8 1 1 1 0 1 1D000H to 1DFFFH
SA9 1 1 1 1 X 1E000H to 1FFFFH
Table 5 Sector Address Tables (MBM29LV001BC)
Sector
Address
A16
A15
A14
A13
A12
Address Range
SA0 0 0 0 0 X 00000H to 01FFFH
SA1 0 0 0 1 0 02000H to 02FFFH
SA2 0 0 0 1 1 03000H to 03FFFH
SA3 0 0 1 X X 04000H to 07FFFH
SA4 0 1 0 X X 08000H to 0BFFFH
SA5 0 1 1 X X 0C000H to 0FFFFH
SA6 1 0 0 X X 10000H to 13FFFH
SA7 1 0 1 X X 14000H to 17FFFH
SA8 1 1 0 X X 18000H to 1BFFFH
SA9 1 1 1 X X 1C000H to 1FFFFH
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MBM29LV001BC-55.PDF ] | |
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