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MBM29LV200TC-70 fiches techniques PDF

Fujitsu - 2M (256K x 8/128K x 16) BIT FLASH MEMORY

Numéro de référence MBM29LV200TC-70
Description 2M (256K x 8/128K x 16) BIT FLASH MEMORY
Fabricant Fujitsu 
Logo Fujitsu 





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MBM29LV200TC-70 fiche technique
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20865-3E
FLASH MEMORY
CMOS
2M (256K × 8/128K × 16) BIT
MBM29LV200TC-70/-90/-12/MBM29LV200BC-70/-90/-12
s FEATURES
• Single 3.0 V read, program, and erase
Minimizes system level power requirements
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
• Minimum 100,000 program/erase cycles
• High performance
70 ns maximum access time
• Sector erase architecture
One 8K word, two 4K words, one 16K word, and three 32K words sectors in word mode
One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
T = Top sector
B = Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
When addresses remain stable, automatically switch themselves to low power mode
• Low VCC write inhibit 2.5 V
• Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
(Continued)
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.

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