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PDF Bt861KRF Data sheet ( Hoja de datos )

Número de pieza Bt861KRF
Descripción Multiport YCrCb to NTSC / PAL / SECAM Digital Video Encoder
Fabricantes ETC 
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Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
Digital Video Encoder
The Bt860/861 is a multiport digital video encoder with pixel synchronization and
per-pixel blending capabilities. The three 8-bit YCrCb data ports allow for a variety of
video and graphic overlay configurations useful in video set-top box applications.
The Bt860/861 is specifically designed for video systems requiring composite,
Y/C (S-Video), and simultaneous component YUV or RGB (SCART) video signals.
Worldwide video standards are supported, including NTSC-M (N. America, Taiwan,
Japan), PAL-B,D,G,H,I (Europe, Asia), PAL-M (Brazil), PAL-N (Uruguay, Paraguay),
PAL-Nc (Argentina), PAL-60, NTSC-443, and SECAM. The Bt860 and Bt861 are
functionally identical except that the Bt861 can output the Macrovision 7.x anticopy
algorithm.
Multisource video is a key feature of the Bt860/861. Two general purpose ports
(P and OSD) allow synchronization with sources that can share clock and frame
timing control with the Bt860/861, such as digital video and graphic overlay content
generated by an MPEG video decoder. A third port (VID) is specifically configured to
interface with video decoders such as those in the Conexant VideoStream decoder
family. Any pair of these three ports can be synchronized and blended.
Functional Block Diagram
TTXDAT
TTXREQ
VID[7:0]
VIDCLK
VIDHACT
VIDVACT
VIDVALID
VIDFIELD
HSYNC*
VSYNC*
BLANK*
FIELD
ALPHA[1:0]
P[7:0]
OSD[7:0]
CLKO
XTI
XTO
CLKIN
RESET* SID SIC ALTADDR VREF FSADJ1
Teletext
Encoder
Serial
Interface
Internal
VREF
10
DAC
10
DAC
Pixel
Sync.
and
Mixing
2x
Upsampling
1.3 MHz
LPF
Mod.
and
Mixer
10
DAC
10
DAC
Color
Space
Convert
10
DAC
10
DAC
XTAL
OSC
PLL
Clock
Generation
Internal
VREF
COMP1
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
COMP2
FSADJ2
Distinguishing Features
• Six 10-bit DACs with individual power
management
• Simultaneous output of YUV, S-Video,
and CVBS, or RGB (SCART), S-Video,
and CVBS
• Current drive output DACs for superior
video quality and reduced system cost
• Dynamic video load sensing for reduced
power operation
• Three sharpness filter options (1,2,3.5 dB
gain) and four reduction filter options
• Programmable adjustment of brightness,
contrast, color saturation, and hue
• Glueless interface with a video decoder
• Three 8-bit YCrCb 4:2:2 inputs for overlay
or blending
• ITU-R BT.656, ITU-R BT.601 digital video
input options
• NTSC-M, PAL (B,D,G,H,I), PAL-M, PAL-N,
NTSC-443, PAL-Nc, PAL-60 and SECAM
video output
• 2x upsampling and internal filtering for
reduced cost
• Master or slave video timing with
programmable HSYNC* delay
• Interlaced/noninterlaced operation
• Macrovision 7.x copy protection (Bt861)
• Closed Captioning and Extended Data
Services encoding
• Teletext encoding (WST system B)
• 400 kHz serial programming interface
• On-board voltage reference
• Reduced power modes
• Programmable luma delay (two channels)
• 3.3 V supply, 5 V-tolerant inputs
• Copy Generation Management System
(CGMS) support
• VARIS-II and Wide Screen Signalling
(WSS) multiple aspect ratio support
• Internal color bar generation
• Blue field generation
• 80-pin MQFP package
Related Products
• Bt852, Bt868/869, Bt864A/865A,
Bt866/867
• Bt835, Bt829A/B
Applications
• Digital cable television systems
• Satellite TV receivers (DBS/DVB/DSS)
• DVD players
• Video CD players
• Digital cameras
• PC add-on cards
• Video editing
Data Sheet
D860DSA
July 27, 1999

1 page




Bt861KRF pdf
Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
Table of Contents
4.0 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.1 PC Board Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.1.1 Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.1.2 Power and Ground Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.1.3 Device Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.1.4 Power Supply Decoupling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.1.5 COMP Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.1.6 VREF Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.1.7 VBIAS Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.1.8 Digital Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4.1.9 Analog Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4.1.10 ESD and Latchup Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
5.0 Serial Programming Interface and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5.1 Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5.1.1 Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.1.2 Writing Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.1.3 Reading Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5.2 Internal Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.2.1 Register Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.3 Register Index. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
5.4 Register Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
6.0 Parametric Data and Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.1 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.1.1 Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.2 Mechanical Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
D860DSA
Conexant
v

5 Page





Bt861KRF arduino
1
1.0 Functional Description
1.1 Pin Descriptions
Figure 1-1. Pinout Diagram
D860DSA
VID2
VID3
VID4
VID5
VID6
VID7
VDD
GND
VIDCLK
V ID VA L ID
VIDVACT
VIDHACT
P0
P1
P2
P3
GND
VDDMAX
P4
P5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80-pin MQFP
60 AGND
59 DACA
58 DACB
57 DACC
56 VBIAS1
55 VAA
54 COMP1
53 FSADJ1
52 VAA
51 AGND
50 AGND
49 VREF
48 FJADJ2
47 COMP2
46 VAA
45 VBIAS2
44 DACD
43 DACE
42 DACF
41 AGND
Conexant
861_027
1-1

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