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PDF AT89C2051 Data sheet ( Hoja de datos )

Número de pieza AT89C2051
Descripción 8-Bit Microcontroller
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! AT89C2051 Hoja de datos, Descripción, Manual

Features
Compatible with MCS®-51Products
2K Bytes of Reprogrammable Flash Memory
– Endurance: 10,000 Write/Erase Cycles
2.7V to 6V Operating Range
Fully Static Operation: 0 Hz to 24 MHz
Two-level Program Memory Lock
128 x 8-bit Internal RAM
15 Programmable I/O Lines
Two 16-bit Timer/Counters
Six Interrupt Sources
Programmable Serial UART Channel
Direct LED Drive Outputs
On-chip Analog Comparator
Low-power Idle and Power-down Modes
Green (Pb/Halide-free) Packaging Option
8-bit
Microcontroller
with 2K Bytes
Flash
1. Description
The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with
2K bytes of Flash programmable and erasable read-only memory (PEROM). The
device is manufactured using Atmel’s high-density nonvolatile memory technology
and is compatible with the industry-standard MCS-51 instruction set. By combining a
versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C2051 is a power-
ful microcomputer which provides a highly-flexible and cost-effective solution to many
embedded control applications.
The AT89C2051 provides the following standard features: 2K bytes of Flash, 128
bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt
architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator
and clock circuitry. In addition, the AT89C2051 is designed with static logic for opera-
tion down to zero frequency and supports two software selectable power saving
modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial
port and interrupt system to continue functioning. The power-down mode saves the
RAM contents but freezes the oscillator disabling all other chip functions until the next
hardware reset.
AT89C2051
0368H–MICRO–6/08

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AT89C2051 pdf
AT89C2051
6. Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
the table below.
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.
Table 6-1. AT89C2051 SFR Map and Reset Values
0F8H
0F0H
B
00000000
0E8H
0E0H
ACC
00000000
0D8H
0D0H
0C8H
PSW
00000000
0C0H
0B8H
0B0H
0A8H
0A0H
IP
XXX00000
P3
11111111
IE
0XX00000
98H
SCON
00000000
90H
P1
11111111
88H
TCON
00000000
80H
SBUF
XXXXXXXX
TMOD
00000000
SP
00000111
TL0
00000000
DPL
00000000
TL1
00000000
DPH
00000000
TH0
00000000
TH1
00000000
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
PCON
0XXX0000
87H
0368H–MICRO–6/08
5

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AT89C2051 arduino
AT89C2051
14. Flash Programming and Verification Characteristics
TA = 0°C to 70°C, VCC = 5.0 ± 10%
Symbol
Parameter
Min Max Units
VPP Programming Enable Voltage
IPP Programming Enable Current
tDVGL
Data Setup to PROG Low
tGHDX
Data Hold after PROG
tEHSH
P3.4 (ENABLE) High to VPP
tSHGL
VPP Setup to PROG Low
tGHSL
VPP Hold after PROG
tGLGH
PROG Width
tELQV
ENABLE Low to Data Valid
tEHQZ
Data Float after ENABLE
tGHBL
PROG High to BUSY Low
tWC Byte Write Cycle Time
tBHIH
RDY/BSY\ to Increment Clock Delay
tIHIL Increment Clock High
Note: 1. Only used in 12-volt programming mode.
11.5 12.5
250
1.0
1.0
1.0
10
10
1 110
1.0
0 1.0
50
2.0
1.0
200
V
µA
µs
µs
µs
µs
µs
µs
µs
µs
ns
ms
µs
ns
15. Flash Programming and Verification Waveforms
0368H–MICRO–6/08
11

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