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PDF AT89C51RD2 Data sheet ( Hoja de datos )
| Número de pieza | AT89C51RD2 | |
| Descripción | 8-bit Flash Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 80C52 Compatible
– 8051 Instruction Compatible
– Six 8-bit I/O Ports (64 Pins or 68 Pins Versions)
– Four 8-bit I/O Ports (44 Pins Version)
– Three 16-bit Timer/Counters
– 256 Bytes Scratch Pad RAM
– 9 Interrupt Sources with 4 Priority Levels
• Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply
• ISP (In-System Programming) Using Standard VCC Power Supply
• 2048 Bytes Boot ROM Contains Low Level Flash Programming Routines and a Default
Serial Loader
• High-speed Architecture
– In Standard Mode:
• 40 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
• 60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
– In X2 mode (6 Clocks/machine cycle)
• 20 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
• 30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
• 64K Bytes On-chip Flash Program/Data Memory
– Byte and Page (128 Bytes) Erase and Write
– 100k Write Cycles
• On-chip 1792 bytes Expanded RAM (XRAM)
– Software Selectable Size (0, 256, 512, 768, 1024, 1792 Bytes)
– 768 Bytes Selected at Reset for T89C51RD2 Compatibility
• On-chip 2048 Bytes EEPROM Block for Data Storage (AT89C51ED2 Only)
• 100K Write Cycles
• Dual Data Pointer
• Variable Length MOVX for Slow RAM/Peripherals
• Improved X2 Mode with Independent Selection for CPU and Each Peripheral
• Keyboard Interrupt Interface on Port 1
• SPI Interface (Master/Slave Mode)
• 8-bit Clock Prescaler
• 16-bit Programmable Counter Array
– High Speed Output
– Compare/Capture
– Pulse Width Modulator
– Watchdog Timer Capabilities
• Asynchronous Port Reset
• Full-duplex Enhanced UART with Dedicated Internal Baud Rate Generator
• Low EMI (Inhibit ALE)
• Hardware Watchdog Timer (One-time Enabled with Reset-Out), Power-off Flag
• Power Control Modes: Idle Mode, Power-down Mode
• Single Range Power Supply: 2.7V to 5.5V
• Industrial Temperature Range (-40 to +85°C)
• Packages: PLCC44, VQFP44, PLCC68, VQFP64
8-bit Flash
Microcontroller
AT89C51RD2
AT89C51ED2
1 page  
AT89C51RD2/ED2
Table 3-3.
Mnemonic
Interrupt SFRs
Add Name
76543210
IEN0
A8h Interrupt Enable Control 0
EA EC ET2 ES ET1 EX1 ET0 EX0
IEN1
B1h Interrupt Enable Control 1
- - - - - ESPI
KBD
IPH0
B7h Interrupt Priority Control High 0
-
PPCH PT2H
PHS
PT1H
PX1H
PT0H
PX0H
IPL0
B8h Interrupt Priority Control Low 0
-
PPCL
PT2L
PLS
PT1L
PX1L
PT0L
PX0L
IPH1
B3h Interrupt Priority Control High 1
-
-
-
-
- SPIH
KBDH
IPL1
B2h Interrupt Priority Control Low 1
-
-
-
-
- SPIL
KBDL
Table 3-4.
Mnemonic
Port SFRs
Add Name
76543210
P0 80h 8-bit Port 0
P1 90h 8-bit Port 1
P2 A0h 8-bit Port 2
P3 B0h 8-bit Port 3
P4 C0h 8-bit Port 4
P5 E8h 8-bit Port 5
P5 C7h 8-bit Port 5 (byte addressable)
Table 3-5.
Mnemonic
TCON
TMOD
TL0
TH0
TL1
TH1
WDTRST
WDTPRG
T2CON
T2MOD
RCAP2H
RCAP2L
TH2
Timer SFRs
Add Name
7
88h Timer/Counter 0 and 1 Control
TF1
89h Timer/Counter 0 and 1 Modes
GATE1
8Ah Timer/Counter 0 Low Byte
8Ch Timer/Counter 0 High Byte
8Bh Timer/Counter 1 Low Byte
8Dh Timer/Counter 1 High Byte
A6h WatchDog Timer Reset
A7h WatchDog Timer Program
-
C8h Timer/Counter 2 control
TF2
C9h Timer/Counter 2 Mode
-
CBh
Timer/Counter 2 Reload/Capture
High Byte
CAh
Timer/Counter 2 Reload/Capture
Low Byte
CDh Timer/Counter 2 High Byte
6
TR1
C/T1#
-
EXF2
-
5
TF0
M11
-
RCLK
-
432
TR0 IE1
IT1
M01
GATE0 C/T0#
-
TCLK
-
-
EXEN2
-
WTO2
TR2
-
1
IE0
M10
0
IT0
M00
WTO1
C/T2#
T2OE
WTO0
CP/RL2#
DCEN
4235K–8051–05/08
5
5 Page 
AT89C51RD2/ED2
Table 4-1. Pin Description
Pin Number
Type
Mnemonic PLCC44 VQFP44 PLCC68 VQFP64
Name and Function
VSS
22 16
51
40 I Ground: 0V reference
VCC
44 38
17
8
I
Power Supply: This is the power supply voltage for normal, idle and
power-down operation
P0.0 - P0.7 43 - 36
37 - 30
15, 14, 6, 5, 3, 2,
12, 11,
64,
9,6, 5, 3 61,60,59
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that
have 1s written to them float and can be used as high impedance inputs.
Port 0 must be polarized to VCC or VSS in order to prevent any parasitic
current consumption. Port 0 is also the multiplexed low-order address
I/O and data bus during access to external program and data memory. In this
application, it uses strong internal pull-up when emitting 1s. Port 0 also
inputs the code bytes during EPROM programming. External pull-ups are
required during program verification during which P0 outputs the code
bytes.
P1.0 - P1.7
2-9
40 - 44
1-3
19, 21,
22, 23,
25, 27,
28, 29
10, 12,
13, 14,
16, 18,
19, 20
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1
I/O pins that have 1s written to them are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 1 pins that are externally
pulled low will source current because of the internal pull-ups. Port 1 also
receives the low-order address byte during memory programming and
verification.
Alternate functions for AT89C51RD2/ED2 Port 1 include:
2 40 19
10 I/O P1.0: Input/Output
I/O T2 (P1.0): Timer/Counter 2 external count input/Clockout
3 41 21
12 I/O P1.1: Input/Output
I T2EX: Timer/Counter 2 Reload/Capture/Direction Control
I SS: SPI Slave Select
4 42 22
13 I/O P1.2: Input/Output
I ECI: External Clock for the PCA
5 43 23
14 I/O P1.3: Input/Output
I/O CEX0: Capture/Compare External I/O for PCA module 0
6 44 25
16 I/O P1.4: Input/Output
I/O CEX1: Capture/Compare External I/O for PCA module 1
7 1 27 18 I/O P1.5: Input/Output
I/O CEX2: Capture/Compare External I/O for PCA module 2
I/O MISO: SPI Master Input Slave Output line
When SPI is in master mode, MISO receives data from the slave
peripheral. When SPI is in slave mode, MISO outputs data to the master
controller.
8 2 28 19 I/O P1.6: Input/Output
I/O CEX3: Capture/Compare External I/O for PCA module 3
I/O SCK: SPI Serial Clock
4235K–8051–05/08
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AT89C51RD2.PDF ] | |
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