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PDF AT403 Data sheet ( Hoja de datos )
| Número de pieza | AT403 | |
| Descripción | PHASE CONTROL THYRISTOR | |
| Fabricantes | Power Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AT403 (archivo pdf) en la parte inferior de esta página. Total 4 Páginas | ||
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POSEICO
POSEICO SPA
POwer SEmiconductors Italian COrporation
POSEICO SPA
Via N. Lorenzi 8, 16152 Genova - ITALY
Tel. ++ 39 010 6556234 - Fax ++ 39 010 6557519
Sales Office:
Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510
PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
gen 03 - ISSUE : 05
AT403
Repetitive voltage up to
Mean on-state current
Surge current
Symbol Characteristic
Conditions
BLOCKING
V RRM
Repetitive peak reverse voltage
V RSM
Non-repetitive peak reverse voltage
V DRM
Repetitive peak off-state voltage
I RRM
Repetitive peak reverse current
V=VRRM
I DRM
Repetitive peak off-state current
V=VDRM
CONDUCTING
I T (AV)
Mean on-state current
180° sin, 50 Hz, Th=55°C, double side cooled
I T (AV)
Mean on-state current
180° sin, 50 Hz, Tc=85°C, double side cooled
I TSM
Surge on-state current
sine wave, 10 ms
I² t I² t
without reverse voltage
V T On-state voltage
On-state current =
600 A
V T(TO)
Threshold voltage
r T On-state slope resistance
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 410 A, gate 10V 5ohm
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
td Gate controlled delay time, typical
VD=100V, gate source 10V, 10 ohm , tr=.5 µs
tq
Circuit commutated turn-off time, typical
dV/dt = 20 V/µs linear up to 75% VDRM
Q rr Reverse recovery charge
di/dt=-20 A/µs, I= 270 A
I rr Peak reverse recovery current
VR= 50 V
I H Holding current, typical
VD=5V, gate open circuit
I L Latching current, typical
VD=5V, tp=30µs
GATE
V GT
Gate trigger voltage
VD=5V
I GT Gate trigger current
VD=5V
V GD
Non-trigger gate voltage, min.
VD=VDRM
V FGM
Peak gate voltage (forward)
I FGM
Peak gate current
V RGM
Peak gate voltage (reverse)
P GM
Peak gate power dissipation
Pulse width 100 µs
P G Average gate power dissipation
MOUNTING
R th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
R th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T j Operating junction temperature
F Mounting force
Mass
ORDERING INFORMATION : AT403 S 12
standard specification
VDRM&VRRM/100
1200 V
400 A
5 kA
Tj
[°C]
Value
Unit
125 1200
125 1300
125 1200
125 30
125 30
V
V
V
mA
mA
400 A
320 A
125 5
kA
125 x1E3 A²s
25 1.35
V
125 1.0
V
125 0.850
mohm
125 200
125 500
25 0.6
200
125
25 300
25 700
A/µs
V/µs
µs
µs
µC
A
mA
mA
25 3.5
25 200
125 0.25
20
8
5
75
1
V
mA
V
V
A
V
W
W
95
20
-30 / 125
4.9 / 5.9
55
°C/kW
°C/kW
°C
kN
g
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet AT403.PDF ] | |
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