AD637 Datasheet PDF - Analog Devices
| Part Number | AD637 | |
| Description | High Precision/ Wide-Band RMS-to-DC Converter | |
| Manufacturers | Analog Devices | |
| Logo |  |
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a
High Precision,
Wide-Band RMS-to-DC Converter
AD637
FEATURES
High Accuracy
0.02% Max Nonlinearity, 0 V to 2 V RMS Input
0.10% Additional Error to Crest Factor of 3
Wide Bandwidth
8 MHz at 2 V RMS Input
600 kHz at 100 mV RMS
Computes:
True RMS
Square
Mean Square
Absolute Value
dB Output (60 dB Range)
Chip Select-Power Down Feature Allows:
Analog “3-State” Operation
Quiescent Current Reduction from 2.2 mA to 350 A
Side-Brazed DIP, Low Cost Cerdip and SOIC
PRODUCT DESCRIPTION
The AD637 is a complete high accuracy monolithic rms-to-dc
converter that computes the true rms value of any complex
waveform. It offers performance that is unprecedented in inte-
grated circuit rms-to-dc converters and comparable to discrete
and modular techniques in accuracy, bandwidth and dynamic
range. A crest factor compensation scheme in the AD637 per-
mits measurements of signals with crest factors of up to 10 with
less than 1% additional error. The circuit’s wide bandwidth per-
mits the measurement of signals up to 600 kHz with inputs of
200 mV rms and up to 8 MHz when the input levels are above
1 V rms.
As with previous monolithic rms converters from Analog Devices,
the AD637 has an auxiliary dB output available to the user. The
logarithm of the rms output signal is brought out to a separate
pin allowing direct dB measurement with a useful range of
60 dB. An externally programmed reference current allows the
user to select the 0 dB reference voltage to correspond to any
level between 0.1 V and 2.0 V rms.
A chip select connection on the AD637 permits the user to
decrease the supply current from 2.2 mA to 350 µA during
periods when the rms function is not in use. This feature facili-
tates the addition of precision rms measurement to remote or
hand-held applications where minimum power consumption is
critical. In addition when the AD637 is powered down the out-
put goes to a high impedance state. This allows several AD637s
to be tied together to form a wide-band true rms multiplexer.
The input circuitry of the AD637 is protected from overload
voltages that are in excess of the supply levels. The inputs will
not be damaged by input signals if the supply voltages are lost.
FUNCTIONAL BLOCK DIAGRAMS
Ceramic DIP (D) and
Cerdip (Q) Packages
BUFFER
1
AD637
14
2
3
BIAS
SECTION
4
5
25k⍀
6
ABSOLUTE
VALUE
SQUARER/DIVIDER
25k⍀
13
12
11
10
9
7
FILTER
8
SOIC (R) Package
BUFFER
1
AD637
16
2
3
BIAS
SECTION
4
5
25k⍀
6
7
ABSOLUTE
VALUE
SQUARER/DIVIDER
25k⍀
15
14
13
12
FILTER
11
10
89
The AD637 is available in two accuracy grades (J, K) for com-
mercial (0°C to +70°C) temperature range applications; two
accuracy grades (A, B) for industrial (–40°C to +85°C) applica-
tions; and one (S) rated over the –55°C to +125°C temperature
range. All versions are available in hermetically-sealed, 14-lead
side-brazed ceramic DIPs as well as low cost cerdip packages. A
16-lead SOIC package is also available.
PRODUCT HIGHLIGHTS
1. The AD637 computes the true root-mean-square, mean
square, or absolute value of any complex ac (or ac plus dc)
input waveform and gives an equivalent dc output voltage.
The true rms value of a waveform is more useful than an
average rectified signal since it relates directly to the power of
the signal. The rms value of a statistical signal is also related
to the standard deviation of the signal.
2. The AD637 is laser wafer trimmed to achieve rated perfor-
mance without external trimming. The only external compo-
nent required is a capacitor which sets the averaging time
period. The value of this capacitor also determines low fre-
quency accuracy, ripple level and settling time.
3. The chip select feature of the AD637 permits the user to
power down the device down during periods of nonuse,
thereby, decreasing battery drain in remote or hand-held
applications.
4. The on-chip buffer amplifier can be used as either an input
buffer or in an active filter configuration. The filter can be
used to reduce the amount of ac ripple, thereby, increasing
the accuracy of the measurement.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
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AD637
OPTIONAL TRIMS FOR HIGH ACCURACY
The AD637 includes provisions to allow the user to trim out
both output offset and scale factor errors. These trims will result
in significant reduction in the maximum total error as shown in
Figure 4. This remaining error is due to a nontrimmable input
offset in the absolute value circuit and the irreducible non-
linearity of the device.
The trimming procedure on the AD637 is as follows:
l. Ground the input signal, VIN and adjust R1 to give 0 V out-
put from Pin 9. Alternatively R1 can be adjusted to give the
correct output with the lowest expected value of VIN.
2. Connect the desired full scale input to VIN, using either a dc
or a calibrated ac signal, trim R3 to give the correct output at
Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a
2 V peak-to-peak sine wave should give 0.707 V dc output.
Remaining errors are due to the nonlinearity.
5.0
AD637K MAX
2.5
INTERNAL TRIM
0
AD637K
EXTERNAL TRIM
2.5
AD637K: 0.5mV ؎0.2%
0.25mV ؎0.05%
EXTERNAL
5.0
0
0.5 1.0 1.5
INPUT LEVEL – Volts
2.0
Figure 4. Max Total Error vs. Input Level AD637K
Internal and External Trims
functions of input signal frequency f, and the averaging time
constant τ (τ: 25 ms/µF of averaging capacitance). As shown in
Figure 6, the averaging error is defined as the peak value of the
ac component, ripple, plus the value of the dc error.
The peak value of the ac ripple component of the averaging er-
ror is defined approximately by the relationship:
50
6.3 τf in % of reading where (t > 1/f)
EO
IDEAL
EO
DC ERROR = AVERAGE OF OUTPUT–IDEAL
AVERAGE ERROR
DOUBLE-FREQUENCY
RIPPLE
TIME
Figure 6. Typical Output Waveform for a Sinusoidal Input
This ripple can add a significant amount of uncertainty to the
accuracy of the measurement being made. The uncertainty can
be significantly reduced through the use of a post filtering net-
work or by increasing the value of the averaging capacitor.
The dc error appears as a frequency dependent offset at the
output of the AD637 and follows the equation:
1
0.16 + 6.4τ2 f 2 in % of reading
Since the averaging time constant, set by CAV, directly sets the
time that the rms converter “holds” the input signal during
computation, the magnitude of the dc error is determined only
by CAV and will not be affected by post filtering.
100
BUFFER
1
AD637
2
+VS 3
OUTPUT R1
OFFSET
ADJUST
50k⍀
R2
1M⍀
–VS
4
5
6
BIAS
SECTION
25k⍀
ABSOLUTE
VALUE
SQUARER/DIVIDER
25k⍀
7 FILTER
14
R4
147⍀
13
VIN
12
11 +VS
10 –VS
9
+
V rms
OUT
8 CAV
R3
1k⍀
SCALE FACTOR ADJUST,
؎2%
Figure 5. Optional External Gain and Offset Trims
CHOOSING THE AVERAGING TIME CONSTANT
The AD637 will compute the true rms value of both dc and ac
input signals. At dc the output will track the absolute value of
the input exactly; with ac signals the AD637’s output will ap-
proach the true rms value of the input. The deviation from the
ideal rms value is due to an averaging error. The averaging error
is comprised of an ac and dc component. Both components are
10
PEAK RIPPLE
1.0
DC ERROR
0.1
10
100 1k
SINEWAVE INPUT FREQUENCY – Hz
10k
Figure 7. Comparison of Percent DC Error to the Percent
Peak Ripple over Frequency Using the AD637 in the Stan-
dard RMS Connection with a 1 × µF CAV
The ac ripple component of averaging error can be greatly
reduced by increasing the value of the averaging capacitor.
There are two major disadvantages to this: first, the value of the
averaging capacitor will become extremely large and second, the
settling time of the AD637 increases in direct proportion to the
value of the averaging capacitor (Ts = 115 ms/µF of averaging
capacitance). A preferable method of reducing the ripple is
through the use of the post filter network, shown in Figure 8.
This network can be used in either a one or two pole configura-
tion. For most applications the single pole filter will give the
best overall compromise between ripple and settling time.
REV. E
–5–
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