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PDF AD7274 Data sheet ( Hoja de datos )

Número de pieza AD7274
Descripción 10-/12-Bit ADCs
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Throughput rate: 3 MSPS
Specified for VDD of 2.35 V to 3.6 V
Power consumption
11.4 mW at 3 MSPS with 3 V supplies
Wide input bandwidth
70 dB SNR at 1 MHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
Temperature range: −40°C to +125°C
Power-down mode: 0.1 μA typ
8-lead TSOT package
8-lead MSOP package
GENERAL DESCRIPTION
The AD7273/AD7274 are 10-/12-bit, high speed, low power,
successive approximation ADCs, respectively. The parts operate
from a single 2.35 V to 3.6 V power supply and feature
throughput rates of up to 3 MSPS. Each part contains a low
noise, wide bandwidth track-and-hold amplifier that can handle
input frequencies in excess of 55 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The input signal is sampled on
the falling edge of CS, and the conversion is also initiated at this
point. The conversion rate is determined by the SCLK. There
are no pipeline delays associated with these parts.
The AD7273/AD7274 use advanced design techniques to
achieve very low power dissipation at high throughput rates.
The reference for the parts is applied externally and can be in
the range of 1.4 V to VDD. This allows the widest dynamic input
range to the ADC.
3 MSPS,10-/12-Bit
ADCs in 8-Lead TSOT
AD7273/AD7274
FUNCTIONAL BLOCK DIAGRAM
VDD
AGND
VIN
VREF
10-/12-BIT
SUCCESSIVE
T/H APPROXIMATION
ADC
CONTROL
LOGIC
AD7273/AD7274
DGND
Figure 1.
SCLK
SDATA
CS
Table 1.
Part Number
AD72731
AD72741
AD7276
AD7277
AD7278
Resolution
10
12
12
10
8
Package
8-lead MSOP 8-Lead TSOT
8-lead MSOP 8-Lead TSOT
8-lead MSOP 6-Lead TSOT
8-lead MSOP 6-Lead TSOT
8-lead MSOP 6-Lead TSOT
1 Parts contain external reference pin.
PRODUCT HIGHLIGHTS
1. 3 MSPS ADCs in an 8-lead TSOT package.
2. High throughput with low power consumption.
3. Flexible power/serial clock speed management.
Allows maximum power efficiency at low throughput rates.
4. Reference can be driven up to the power supply.
5. No pipeline delay.
6. The parts feature a standard successive approximation ADC
with accurate control of the sampling instant via a CS input
and once-off conversion control.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.

1 page




AD7274 pdf
AD7273/AD7274
AD7273 SPECIFICATIONS
VDD = 2.35 V to 3.6 V, VREF = 2.35 V to VDD, fSCLK = 48 MHz, fSAMPLE = 3 MSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)3
Total Harmonic Distortion (THD)3
Peak Harmonic or Spurious Noise (SFDR)3
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Power Supply Rejection Ratio (PSRR)
DC ACCURACY
Resolution
Integral Nonlinearity3
Differential Nonlinearity3
Offset Error3
Gain Error3
Total Unadjusted Error (TUE)3
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
VREF Input Voltage Range
DC leakage Current
Input Capacitance
Input Impedance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VIN
Input Current, IIN
Input Capacitance, CIN4
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance4
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time3
Throughput Rate
B Grade1
61
−72
−77
−80
Unit 2
dB min
dB max
dB typ
dB typ
Test Conditions/Comments
fIN = 1 MHz sine wave
−81
dB typ
fa = 1 MHz, fb = 0.97 MHz
−81
dB typ
fa = 1 MHz, fb = 0.97 MHz
5 ns typ
18 ps typ
74
MHz typ
@ 3 dB
10
MHz typ
@ 0.1 dB
82 dB typ
10 Bits
±0.5 LSB max
±0.5
LSB max
Guaranteed no missed codes to 10 bits
±1 LSB max
±1.5 LSB max
±2.5 LSB max
0 to VREF
±1
±5.5
42
10
V
μA max
μA max
pF typ
pF typ
−40°C to +85°C
85°C to 125°C
When in track
When in hold
1.4 to VDD
±1
20
32
V min/V max
μA max
pF typ
Ω typ
1.7
V min
2.35 V ≤ VDD ≤ 2.7 V
2
V min
2.7 V < VDD ≤ 3.6 V
0.7
V max
2.35 V ≤ VDD< 2.7 V
0.8
V max
2.7 V ≤ VDD ≤ 3.6 V
±1
μA max
Typically 10 nA, VIN = 0 V or VDD
2 pF max
VDD − 0.2
V min
0.2 V max
±2.5 μA max
4.5 pF max
Straight (natural) binary
ISOURCE = 200 μA; VDD = 2.35 V to 3.6 V
ISINK = 200 μA
250
ns max
12 SCLK cycles with SCLK at 48 MHz
60 ns max
3.45
MSPS max
See the Serial Interface section
Rev. 0 | Page 5 of 28

5 Page





AD7274 arduino
TYPICAL PERFORMANCE CHARACTERISTICS
–20 16384 POINT FFT
FSAMPLE = 3MSPS
FIN = 1MHz
SINAD = 71.05
–40 THD = –80.9
SFDR = –82.2
–60
–80
–100
–120
FREQUENCY (kHz)
Figure 10. AD7274 Dynamic Performance at 3 MSPS, Input Tone = 1 MHz
–20 16384 POINT FFT
FSAMPLE = 3MSPS
FIN = 1MHz
SINAD = 66.56
–40 THD = –77.4
SFDR = –78.2
–60
–80
–100
–120
FREQUENCY (kHz)
Figure 11. AD7273 Dynamic Performance at 3 MSP, Input Tone = 1 MHz
72.2
72.0
71.8
71.6
71.4
71.2
71.0
70.8
70.6
70.4
70.2
70.0
69.8
69.6
69.4
69.2
69.0
100
FSAMPLE = 3MSPS
VDD = 3.6V
VDD = 2.5V
VDD = 3V
INPUT FREQUENCY (kHz)
1000 1500
Figure 12. AD7274 SINAD vs. Analog Input Frequency at 3 MSPS
for Various Supply Voltages, SCLK Frequency = 48 MHz
AD7273/AD7274
72.2
72.0
71.8
71.6
71.4
71.2
71.0
70.8
70.6
70.4
70.2
100
VDD = 3V
VDD = 3.6V
FSAMPLE = 3MSPS
VDD = 2.5V
INPUT FREQUENCY (kHz)
1000 1500
Figure 13. AD7274 SNR vs. Analog Input Frequency at 3 MSPS
for Various Supply Voltages, SCLK Frequency = 48 MHz
–72
–74
–76
VDD = 3V
–78
–80
–82 VDD = 2.5V
–84
–86 VDD = 3.6V
–88
–90
100
INPUT FREQUENCY (kHz)
1000 1500
Figure 14. THD vs. Analog Input Frequency at 3 MSPS
for Various Supply Voltages, SCLK Frequency = 48 MHz
–40
–50
RIN = 100Ω
–60
–70
RIN = 10Ω
–80
RIN = 0Ω
–90
100
INPUT FREQUENCY (kHz)
1000 1500
Figure 15. THD vs. Analog Input Frequency at 3 MSPS for Various Source
Impedance, SCLK Frequency = 48 MHz, Supply Voltage = 3 V
Rev. 0 | Page 11 of 28

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