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PDF CT1815 Data sheet ( Hoja de datos )

Número de pieza CT1815
Descripción CT1815 10MHz Low Level Serial Interface for MIL-STD-1397 Type D
Fabricantes Aeroflex Circuit Technology 
Logotipo Aeroflex Circuit Technology Logotipo



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No Preview Available ! CT1815 Hoja de datos, Descripción, Manual

CT1815
10MHz Low Level Serial Interface
for MIL-STD-1397 Type D
Features
• Internally set threshold
• Matched to 50 ohm system impedance power on and off
• Operates with ±5 volt supplies
• Power management
• Accepts synchronous input data
• Unique Manchester decoder requires no clock
• Generates one clock per received bit
• May be used for serial decoding of indefinite word lengths
• Other Wire and Fiber Optic types available
CIRCUIT TECHNOLOGY
www.aeroflex.com
FLEX LA
ISO
9001
CE R T I F I E D
General Description
The CT1815 is a single hybrid micro-circuit which incorporates a serial encoder, transceiver, and Manchester decoder
in one package. The encoder accepts serial NRZ data in conjunction with two synchronous clocks. This data stream is
then Manchester encoded and maybe transformer coupled thru an external transformer to a 75 ohm tri-axial cable for
transmission through up to 1000 feet of cable. The CT1815 receiver section accepts bipolar Manchester encoded
signals and passes level detected signals to the serial decoder. The serial decoder reconstructs an NRZ data stream
with derived clock. This allows the data to be processed by our CT2500 monolithic protocol chip for MIL-STD-1397 serial
interfaces. All the input and output signals of the CT1815 are completely compatible with the CT2500. The CT1815 has
a power management function. A transmitter standby mode is available to reduce the overall power consumption of the
CT1815. Aeroflex Circuit Technology is an 80,000ft2 MIL-PRF-38534 certified facility in Plainview, N.Y.
Serial NRZ Data
10 MHz Shift Clock
20 MHz Gated Clock
Envelope
Master Reset
Encoder Enable
Serial
Manchester
Encoder
Power
Management
Power Management
Decoded Data Envelope
XFMR SEC/DATA Input
XFMR SEC
Primary
1CT:1
Data
Output
+5V
78
Primary
Data
Output
XFMR SEC
ACT15-1031
External to
Hybrid
XFMR SEC/DATA Input
Manchester
Decoder
and
Clock Regeneration
Data
Reconstruction
Rx Strobe
ClockR
Decoded DataR
Figure 1 – Block Diagram
eroflex Circuit Technology – Data Bus Modules For The Future © SCDCT1815 REV A 6/12/98

1 page




CT1815 pdf
Functional Description and Pinout
Pin
#
Pin Name
Function
Load or
Drive
1 No connection
2 No connection
3 XFMR secondary/
RX data input
Transmitter-receiver I/O pin
4 Test Point
No connection permitted
5 Test Point
No connection permitted
6 Test Point
No connection permitted
7 -5 Volts
8 RX strobe
Low level disables receiver
3 S loads
9 Power management Controls transmitter power consumption in conjunction with pin 10 1 S load
input
10 Encoder enable
Controls transmitter power consumption in conjunction with pin 9 1 S load
11 Case/signal GND
12 Case/signal GND
13 Decoded data
envelope
High after reception of first half bit; goes low after reception of last 4 S drive
half bit (normally low in inactive state)
14 TP3 test point
Alignment point: no electrical connection permitted
15 TP1 test point
Alignment point: no electrical connection permitted
16 TP2 test point
Alignment point: no electrical connection permitted
17 -5 Volts
18 TP4 test point
Alignment point: no electrical connection permitted
19 ClockR
20 No connection
Reconstructed clock; one clock pulse per input bit received
3 S drive
21 Decoded DataR
22 No connection
NRZ reconstructed data. Sampled on clockR rising edge
3 S drive
23 +5 volts
24 +5 volts
25 10 MHz encoder shift One cycle required per data bit. Must be high in first half of bit cell 1 S load
clock
26 NRZ serial input data Serial input to be Manchester encoded with the 20 MHz gated CK 1 S load
27 Encode envelope
Must be high to enable transmission; must go low before reception 1 S load
of last 20 MHz positive edge to complete transmission
28 20 MHz gated clock Each bit to be encoded requires two positive edges of the 20 MHz
(encoder)
CK. These edges must occur at 25ns and 75ns into the bit cell.
The end of transmission requires an additional edge in conjunction
with a logic low on the encode envelope. tR, tF < 5nsec.
29 Master reset
Logic low resets encoder
reset pulse <15 nsec
1 S load
2 S load
30 No connection
31 No connection
32 XFMR secondary/
RX DATA input
Transmitter-Receiver I/O pin
33 XFMR secondary
Secondary isolated winding, same phase as outer conducter
34 XFMR primary/
TX DATA output
Transformer lead for connection to outer conductor of tri-axial
Aeroflex Circuit Technology
5 SCDCT1815 REV A 6/12/98 Plainview NY (516) 694-6700

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