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PDF AT16373G Data sheet ( Hoja de datos )
| Número de pieza | AT16373G | |
| Descripción | AT16373 Fast Logic 16-Bit Transparent Latch | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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AT16373
Features
• Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns
• Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1ns/100 pF
(G grade)
• Very low ground bounce < 0.6V @ VCC=5.00V, Ta=25°C
Excellent noise rejection
•• Typical output skew ≤0.25ns
• Bus Hold circuitry to retain last active state during Tri-state™
• Available in SSOP and TSSOP packages
Description
Atmel’s AT16373 devices provide maximum speed in temporary data storage. They
can be operated as either two separate 8 bit latches or as a single 16-bit latch by use
of the output enable and the latch enable. The AT16373 has very low ground bounce
and excellent input noise rejection, giving the user stable signals in a high speed
environment. These devices can drive very large loads while operating in a high speed
transparent mode.
Functional Block Diagram (1)
AT16373
Fast Logic™
16-Bit
Transparent
Latch
AT16373F
AT16373G
Note: 1. This 8-bit latch function is repeated a second time on each device.
Pin Configurations
Pin Names
xOE
xLE
xDχ
xOχ
Descriptions
Output Enable Input
(Active Low)
Latch Enable Inputs
(Active High)
Data Inputs
Tri-State Outputs
1OE 1O1
1O2 GND
1O3
1O4
VCC
1O5
1O6
GND
1O7
1O8
2O1
2O2
GND
2O3
2O4
VCC
2O5
2O6
GND
2O7
2O8
2OE
SSOP/TSSOP
12
34
56
78
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 47
46 45
44 43
42 41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Top View
1D1 1LE
GND 1D2
1D4 1D3
1D5 VCC
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2LE
0756B
5-15
1 page  
AT16373
Typical Values
Parameter
Value
Units
VOLP
0.4
V
VOLV
VOHV
-0.26
VCC - 0.13
V
V
VOHP
VCC + 0.6
V
Note: 1. When multiple outputs are switched at the same time, rapidly changing current on the ground and VCC paths
causes a voltage to develop across the parasitic inductance of the wire bond and package pins. This occurrence
is called simultaneous switching noise. Atmel’s AT16373 products have minimized this phenomenon as shown on
the graph. Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. The ground data is
measured on the one remaining output, which is set to logic low and will reflect any device ground movement.
2. As on the graph for Ground Bounce, a similar condition occurs for low to high transitions. Output data is for 15 outputs
switching simultaneously at a frequency of 1 MHz. VCC droop is measured on the one remaining output pin, which is
set to a logic high. This output will reflect any movement on the device VCC.
Propagation Delay Waveforms
Input
Transition
Output
Transition
1.5 V
tPLH
1.5 V
tPHL
VOH
1.5 V
VOL
Enable and Disable Waveforms(1)
Control
Input
Enable
Disable
Output
Switched
Low
tPZL
Switch Closed
1.5 V
tPLZ
Output
Switched
High
tPZH
Switch Open
1.5 V
tPHZ
Note: 1. Enable and disable waveforms are the same for both xOE and xLE inputs.
0.3 V
0.3 V
3.0 V
1.5 V
0V
3.5 V
VOL
VOH
0V
5-19
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet AT16373G.PDF ] | |
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