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PDF AT16646F Data sheet ( Hoja de datos )

Número de pieza AT16646F
Descripción AT16646 Fast Logic 16-Bit Tri-State Register
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! AT16646F Hoja de datos, Descripción, Manual

AT16646
Features
Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns
Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1ns/100 pF
(G grade)
Very low ground bounce < 0.6 V @ VCC=5.00 V, Ta=25°C
Typical output skew 0.25ns
Bus Hold circuitry to retain last active state during Tri-State
Available in SSOP and TSSOP packages
Description
Atmel’s AT16646 devices are 16-bit high speed, low power Tri-statable D type
registers, ideal for use in systems requiring both transparent and registered mode
functions. They are organized as two separate 8-bit bus transceivers. Data flow is
bi-directional, and can be controlled for multiplexed transmission between A bus and
B bus either directly or from the D registers by use of the direction control pin (xDir),
output enable (xOE), and select lines (xSAB and xSBA). Storage of data on the A bus
and B bus is controlled by the output pins. They have very low ground bounce and
excellent input noise rejection, giving the user stable signals in a high speed
environment. The Bus Hold feature eliminates the need for pull-up or pull-down
resistors and retains the last active state during a Tri-State event.
Functional Block Diagram
AT16646
Fast Logic
16-Bit
Tri-State
Register
AT16646F
AT16646G
Pin Configurations
Pin Names Descriptions
xDir, xOE
Output Enable Inputs
xCLKAB,xCLKBA Clock Pulse Inputs
xSAB, xSBA Output Data Source Select Inputs
xAχ Data Register A Inputs
Data Register B Outputs
xBχ Data Register B Inputs
Data Register A Outputs
SSOP/TSSOP
1DIR
1CLKAB
1SAB
GND
1A1
1A2
VCC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2SAB
2CLKAB
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1CLKBA
1SBA
GND
1B1
1B2
VCC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
2SBA
2CLKBA
2OE
Top View
0757B
5-21

1 page




AT16646F pdf
AT16646
Propagation Delay Waveforms
Input
Transition
Output
Transition
1.5 V
tPLH
1.5 V
tPHL
Enable and Disable Waveforms(1)
Enable
Control
Input
Disable
Output
Switched
Low
tPZL
Switch Closed
1.5 V
tPLZ
Output
Switched
High
tPZH
Switch Open
1.5 V
tPHZ
Note: 1. Enable and disable waveforms are the same for both xOE and xDIR inputs.
0.3 V
0.3 V
VOH
1.5 V
VOL
3.0 V
1.5 V
0V
3.5 V
VOL
VOH
0V
5-25

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