AT24CS256 Datasheet PDF - ATMEL Corporation
| Part Number | AT24CS256 | |
| Description | 2-Wire Serial EEPROMs | |
| Manufacturers | ATMEL Corporation | |
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Features
• One-time Programmable (OTP) Feature
• Low-voltage and Standard-voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
• Internally Organized 16,384 x 8 and 32,768 x 8
• 2-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms typical)
• High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years
– ESD Protection: >4000V
• Automotive Grade and Extended Temperature Devices Available
• 8-pin JEDEC PDIP and 8-pin JEDEC and EIAJ SOIC Packages
Description
The AT24CS128/256 provides 131,072/262,144 bits of serial electrically-erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device’s cascadable feature allows up to 4 devices to share a common
2-wire bus. The device also features a one-time programmable 2048-bit array, which
once enabled, becomes read-only and cannot be overwritten. If not enabled, the OTP
section will function as part of the normal memory array. The device is optimized for
use in many industrial and commercial applications where low-power and low-voltage
operation are essential. The devices are available in space-saving 8-pin JEDEC PDIP
(AT24CS128/256), 8-pin EIAJ (AT24CS128/256), 8-pin JEDEC SOIC (AT24CS128)
packages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V
to 5.5V) and 1.8V (1.8V to 3.6V) versions.
Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
PDIP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Pin SOIC
2-wire Serial
EEPROMs
with Permanent
Software Write
Protect
128K (16,384 x 8)
256K (32,768 x 8)
AT24CS128
AT24CS256
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Rev. 1152B–05/01
1
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Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)
AT24CS128/256
Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)
SCL
SDA
8th BIT ACK
Note:
WORD n
STOP
CONDITION
t (1)
WR
START
CONDITION
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write
cycle.
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for AT24CS256 electronic component. |
| Information | Total 13 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ AT24CS256.PDF Datasheet ] | |
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