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PDF AT27C4096-55JI Data sheet ( Hoja de datos )
| Número de pieza | AT27C4096-55JI | |
| Descripción | 4-Megabit 256K x 16 OTP EPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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AT27C4096
Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz
• JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
• Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
• 5V ± 10% Power Supply
• High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 50 µs/word (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program-
mable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.
Pin Configurations
PDIP Top View
(continued)
Pin Name Function
A0 - A17 Addresses
O0 - O15 Outputs
CE Chip Enable
OE Output Enable
NC
Note:
No Connect
Both GND pins must be
connected.
4-Megabit
(256K x 16)
OTP EPROM
AT27C4096
PLCC Top View
TSOP Top View
Type 1
0311E-A–06/97
1
1 page  
AC Waveforms for Read Operation(1)
AT27C4096
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Input Test Waveforms and Measurement Levels
For -55 devices only:
Output Test Load
tR, tF < 5 ns (10% to 90%)
For -70, -90, -12 and -15 devices:
Note:
CL = 100 pF including jig
capacitance, except for
the -45 and -55 devices,
where CL = 30 pF.
tR, tF < 20 ns (10% to 90%)
Pin Capacitance
(f = 1 MHz T = 25°C)(1)
Typ Max Units
Conditions
CIN
4 10 pF
VIN = 0V
COUT
8 12 pF
VOUT = 0V
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AT27C4096-55JI.PDF ] | |
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