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PDF AT27C520-70TI Data sheet ( Hoja de datos )
| Número de pieza | AT27C520-70TI | |
| Descripción | 512K 64K x 8 Multiplexed Addresses/ Outputs OTP EPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 8-Bit Multiplexed Addresses/Outputs
• Fast Read Access Time - 70 ns
• Low Power CMOS Operation
– 20 mA max. Active at 5 MHz
• 20-Lead TSSOP Package
• 20-Lead SOIC Package
• 28-Lead TSOP Package
• 5V ± 10% Supply
• High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 50 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Range
Description
The AT27C520 is a low-power, high performance 524,288 bit one-time programmable
read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches for
the 8 lower order address bits to multiplex with the 8 data bits. This minimizes system
chip count, reduces cost, and simplifies the design of multiplexed bus systems. It
requires only one 5V power supply in normal read mode operation. Any byte can be
accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on
high performance microprocessor systems.
Atmel’s scaled CMOS technology provides high speed, lower active power consump-
tion, and significantly faster programming. Power consumption is typically only 8 mA
in Active Mode.
The AT27C520 is available in 173 mil, 20-pin TSSOP; 300 mil, 20-pin SOIC; and 28-
pin TSOP, one-time programmable (OTP) plastic packages.
(continued)
Pin Configurations
TSSOP Top View
Pin Name Function
A8 - A15 Addresses
AD0 - AD7 Addresses/Outputs
OE /VPP
ALE
Output Enable/VPP
Address Latch Enable
TSOP Top View
A10
NC
NC
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
NC
NC
A9
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21 A8
20 NC
19 NC
18 AD1
17 AD3
16 AD5
15 AD7
14 GND
13 AD6
12 AD4
11 AD2
10 NC
9 NC
8 AD0
A10
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
A9
1
2
3
4
5
6
7
8
9
10
20 A8
19 AD1
18 AD3
17 AD5
16 AD7
15 GND
14 AD6
13 AD4
12 AD2
11 AD0
SOIC Top View
OE/VPP
A15
A13
A11
A9
AD0
AD2
AD4
AD6
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 ALE
18 A14
17 A12
16 A10
15 A8
14 AD1
13 AD3
12 AD5
11 AD7
512K (64K x 8)
Multiplexed
Addresses/
Outputs
OTP EPROM
AT27C520
Rev. 0752C-C–01/98
1
1 page  
AC Waveforms for Read Operation(1)
tALE
ALE
AT27C520
OE/VPP
AD7 - AD0
tAS tAH
ADDRESS IN
tOE
tACC
tOH
DATA OUT
tDF
A15 - A8
Notes: 1. Timing measurement reference levels for all speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL =
0.45V and VIH = 2.4V.
2. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC.
3. This parameter is only sampled and is not 100% tested.
4. Output float is defined as the point when data is no longer driven.
Input Test Waveforms and Measurement Levels
For -70 and -90 devices:
Output Test Load
tR, tF < 20 ns (10% to 90%)
Note: CL = 100 pF including jig
capacitance.
Pin Capacitance (f = 1 MHz, T = 25°C)(1)
Typ Max
Units
Conditions
CIN
46
pF
VIN = 0V
COUT
8 12
pF
VOUT = 0V
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AT27C520-70TI.PDF ] | |
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