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PDF 3961 Data sheet ( Hoja de datos )
| Número de pieza | 3961 | |
| Descripción | DUAL FULL-BRIDGE PWM MOTOR DRIVER | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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3961
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
3961
DUAL FULL-BRIDGE PWM MOTOR DRIVER
Designed for pulse-width modulated (PWM) current control of
bipolar stepper motors, the A3961S— is capable of continuous output
OUT1B 1
24 OUT2B
currents to ±800 mA and operating voltages to 45 V. Internal fixed
E1 2
SENSE1 3
OUT1A 4
TVBB1 5
GROUND 6
CGROUND 7
UVREFOUT 8
D YVREFIN 9
LRC1 10
PHASE1 11
O NENABLE1 12
23 E 2
22 SENSE 2
21 OUT2A
20 V BB2
19 GROUND
18 GROUND
17 I FULL/PD
16 V CC
15 RC2
14 PHASE 2
13 ENABLE2
PR ONote the A3961SB (DIP) and the A3961SLB
(SOIC) are electrically identical and share a
Ecommon terminal number assignment.
D CABSOLUTE MAXIMUM RATINGS
E NLoad Supply Voltage, VBB . . . . . . . . . . 45 V
U EOutput Current, IOUT . . . . . . . . . . ±800 mA*
Logic Supply Voltage, VCC . . . . . . . . . 7.0 V
IN RLogic Input Voltage Range,
VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V
T ESense Voltage, VSENSE . . . . . . . . . . . . 1.0 V
N FReference Output Current,
IREF OUT . . . . . . . . . . . . . . . . . . . 1.0 mA
O EPackage Power Dissipation,
C RPD . . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA . . . . . . . . . . . . . . . . . -20˚C to +85˚C
IS RJunction Temperature, TJ . . . . . . . +150˚C†
Storage Temperature Range,
D FOTS . . . . . . . . . . . . . . . . -55˚C to +150˚C
off-time PWM current-control circuitry can be used to regulate the
maximum load current to a desired value. An internal precision voltage
reference is provided to improve motor peak current control accuracy.
The peak load current limit is set by the user’s selection of an external
resistor divider and current-sensing resistors.
The fixed off-time pulse duration is set by user-selected external
RC timing networks. The capacitor in the RC timing network also
determines a user-selectable blanking window that prevents false
triggering of the PWM current control circuitry during switching transi-
tions. This eliminates the need for two external RC filter networks on
the current-sensing comparator inputs.
For each bridge the PHASE input controls load current polarity by
selecting the appropriate source and sink driver pair. For each bridge
the ENABLE input, when held high, disables the output drivers. Special
power-up sequencing is not required. Internal circuit protection includes
thermal shutdown with hysteresis, transient-suppression diodes, and
crossover-current protection.
The A3961S— is supplied in a choice of two power packages:
24-pin dual-in-line plastic package with copper heat-sink tabs and
24-lead plastic SOIC with copper heat-sink tabs. In both packages the
power tab is at ground potential and needs no electrical isolation.
FEATURES
s ±800 mA Continuous Output Current Rating
s 45 V Output Voltage Rating
s Internal PWM Current Control, Saturated Sink Drivers
s Internally Generated Precision 2.5 V Reference
s Internal Transient-Suppression Diodes
s Internal Thermal-Shutdown Circuitry
s Crossover-Current Protection, UVLO Protection
—* Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction tempera-
ture of 150˚C.
Always order by complete part number:
† Fault conditions that produce excessive
junction temperature will activate device
thermal shutdown circuitry. These conditions
can be tolerated but should be avoided.
PART NUMBER
A3961SB
A3961SLB
PACKAGE
24-Pin DIP
24-Lead SOIC
RθJA
40°C/W
55°C/W
RθJT
6°C/W
6°C/W
1 page  
3961
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Internal PWM Current Control. The A3961S— contains
a fixed off-time pulse-width modulated (PWM) current-
control circuit that can be used to limit the load current to
a desired value. The peak value of the current limiting
(ITRIP) is set by the selection of an external current-sensing
resistor (RS) and reference input voltage (VREF IN).
The internal circuitry compares the voltage across the
external sense resistor to the voltage on the reference
input terminal (VREF IN), resulting in a transconductance
function approximated by:
internal current-control circuitry (or by the PHASE or
ENABLE inputs). The comparator output is blanked to
prevent false over-current detections due to reverse-
recovery currents of the clamp diodes, and/or switching
transients related to distributed capacitance in the load.
During internal PWM operation, at the end of the tOFF
time, the comparator’s output is blanked and CT begins to
be charged from approximately 1.1 volts by an internal
current source of approximately 1 mA. The comparator
output remains blanked until the voltage on CT reaches
approximately 3.0 volts.
ITRIP ≈
VREF IN
RS
The reference input voltage is typically set with a
resistor divider from VREF OUT. The value of VREF OUT
can be switched from a nominal value of 2.5 V to 1.67 V
by applying a low or high logic signal respectively to the
I FULL/PD terminal. To ensure proper operation of the
voltage reference, the resistor divider (RD = R1+R2) should
have an impedance of 3 kΩ to 15 kΩ. Within this range, a
When a transition of the PHASE input occurs, CT
is discharged to near ground during the crossover delay
time (The crossover delay time is present to prevent
simultaneous conduction of the source and sink drivers).
After the crossover delay, CT is charged by an internal cur-
rent source of approximately 1 mA. The comparator out-
put remains blanked until the voltage on CT reaches
approximately 3.0 volts.
When the device is disabled, via the ENABLE input,
low impedance will minimize the effect of the REF IN input
offset current.
The current-control circuitry limits the load current as
follows: when the load current reaches ITRIP, the compara-
tor resets a latch that turns off the selected source driver.
CT is discharged to near ground. When the device is
re-enabled, CT is charged by an internal current source
of approximately 1 mA. The comparator output remains
blanked until the voltage on CT reaches approximately
3.0 volts.
The load inductance causes the current to recirculate
through the sink driver and flyback diode.
The minimum recommended value for CT is
1000 pF. This value ensures that the blanking time is suffi-
For each bridge, the user selects an external resistor
(RT) and capacitor (CT) to determine the time period
(tOFF = RTCT) during which the source driver remains dis-
abled (see “RC Fixed Off-time” below). The range of rec-
ommended values for CT and RT are 1000 pF to
1500 pF and 15 kΩ to 100 kΩ respectively. For optimal
cient to avoid false trips of the comparator under normal
operating conditions. For optimal regulation of the load
current, the above value for CT is recommended and the
value of RT can be sized to determine tOFF. For more infor-
mation regarding load current regulation, see below.
Load Current Regulation. Because the device operates
load current regulation, CT is normally set to 1000 pF (see in a slow decay mode (2-quadrant PWM mode), there is a
“Load Current Regulation” below). At the end of the RC in- limit to the lowest level that the PWM current control cir-
terval, the source driver is enabled allowing the load cur-
cuitry can regulate load current. The limitation is due to the
rent to increase again. The PWM cycle repeats, maintain- minimum PWM duty cycle, which is a function of the user-
ing the peak load current at the desired value.
RC BLANKING. In addition to determining the fixed off-
time of the PWM control circuit, the CT component sets the
comparator blanking time. This function blanks the output
of the comparator when the outputs are switched by the
selected value of tOFF and the minimum on-time pulse
tON(min)max that occurs each time the PWM latch is reset.
If the motor is not rotating, as in the case of a stepper mo-
tor in hold/detent mode, a brush dc motor when stalled or
at startup, the worst case value of current regulation can
be approximated by:
[(VBB - VSAT(SOURCE+SINK)) tON(min)max] – (1.05 (VSAT(SINK) + VF) tOFF)
I AVG ≈
1.05 (tON(min)max + tOFF) RLOAD
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 3961.PDF ] | |
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