|
|
PDF FIN1028MPX Data sheet ( Hoja de datos )
| Número de pieza | FIN1028MPX | |
| Descripción | 3.3V LVDS 2-Bit High Speed Differential Receiver | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de FIN1028MPX (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
|
No Preview Available !
March 2001
Revised June 2003
FIN1028
3.3V LVDS 2-Bit High Speed Differential Receiver
General Description
This dual receiver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100 mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1028 can be paired with its companion driver, the
FIN1027, or any other LVDS driver.
Features
s Greater than 400Mbs data rate
s 3.3V power supply operation
s 0.4ns maximum differential pulse skew
s 2.5ns maximum propagation delay
s Low power dissipation
s Power-Off protection
s Fail safe protection for open-circuit, shorted and
terminated conditions
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Flow-through pinout simplifies PCB layout
s 8-Lead SOIC and 8-terminal MLP packages save space
Ordering Code:
Order Number Package Number
Package Description
FIN1028M
(Note 1)
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1028MPX
(Preliminary)
MLP08C
8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square
[TAPE and REEL]
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Connection Diagrams
Pin Name
ROUT1, ROUT2
RIN1+, RIN2+
RIN1−, RIN2−
VCC
GND
Description
LVTTL Data Outputs
Non-inverting LVDS Inputs
Inverting LVDS Inputs
Power Supply
Ground
Pin Assignment for SOIC
Function Table
Input
RIN+
RIN+
LH
HL
Fail Safe Condition
H = HIGH Logic Level
L = LOW Logic Level
Fail Safe = Open, Shorted, Terminated
Outputs
ROUT
L
H
H
(Top View)
Terminal Assignments for MLP
© 2003 Fairchild Semiconductor Corporation DS500503
(Top Through View)
www.fairchildsemi.com
1 page  
DC /AC Typical Performance Curves (Continued)
FIGURE 9. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 10. Differential Skew (tPLH - tPHL) vs.
Power Supply Voltage
FIGURE 11. Differential Skew (tPHL - tPHL) vs.
Ambient Temperature
FIGURE 12. Differential Propagation Delay vs.
Differential Input Voltage
FIGURE 13. Differential Propagation Delay vs.
Common-Mode Voltage
FIGURE 14. Transition Time vs.
Power Supply Voltage
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet FIN1028MPX.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| FIN1028MPX | 3.3V LVDS 2-Bit High Speed Differential Receiver | Fairchild Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |