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Numéro de référence | FDC633N | ||
Description | N-Channel Enhancement Mode Field Effect Transistor | ||
Fabricant | Fairchild Semiconductor | ||
Logo | |||
1 Page
March 1998
FDC633N
N-Channel Enhancement Mode Field Effect Transistor
General Description
This N-Channel enhancement mode power field effect
transistors is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
tailored to minimize on-state resistance. These devices are
particularly suited for low voltage applications in notebook
computers, portable phones, PCMICA cards, and other
battery powered circuits where fast switching,low in-line
power loss and resistance to transients are needed in a very
small outline surface mount package.
Features
5.2 A, 30 V. RDS(ON) = 0.042 Ω @ VGS = 4.5 V
RDS(ON) = 0.054 Ω @ VGS = 2.5 V.
SuperSOTTM-6 package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
S
D
D .633
G
D
SuperSOT TM -6 pin 1 D
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
(Note 1)
© 1998 Fairchild Semiconductor Corporation
16
25
34
FDC633N
30
±8
5.2
16
1.6
0.8
-55 to 150
78
30
Units
V
V
A
W
°C
°C/W
°C/W
FDC633N Rev.C
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Pages | Pages 4 | ||
Télécharger | [ FDC633N ] |
No | Description détaillée | Fabricant |
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