M2764A-3F1 Datasheet PDF - STMicroelectronics
| Part Number | M2764A-3F1 | |
| Description | NMOS 64K 8K x 8 UV EPROM | |
| Manufacturers | STMicroelectronics | |
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There is a preview and M2764A-3F1 download ( pdf file ) link at the bottom of this page. Total 10 Pages | ||
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M2764A
NMOS 64K (8K x 8) UV EPROM
FAST ACCESS TIME: 180ns
EXTENDED TEMPERATURE RANGE
SINGLE 5V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 35mA max
TTLCOMPATIBLE DURING READ and PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
28
1
FDIP28W (F)
DESCRIPTION
The M2764A is a 65,536 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 8,192 words by 8 bits.
The M27C64A is housed in a 28 pin Window Ce-
ramic Frit-Seal Dual-in-Line package. The trans-
parent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new
pattern can then be written to the device by follow-
ing the programming procedure.
Figure 1. Logic Diagram
VCC VPP
13
A0-A12
8
Q0-Q7
Table 1. Signal Names
A0 - A12
Q0 - Q7
E
G
P
VPP
VCC
VSS
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program
Program Supply
Supply Voltage
Ground
P M2764A
E
G
VSS
AI00776B
March 1995
1/10
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M2764A
Table 6. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Min
ILI Input Leakage Current
0 ≤ VIN ≤ VCC
ILO Output Leakage Current
VOUT = VCC
ICC Supply Current
E = VIL, G = VIL
ICC1 Supply Current (Standby)
E = VIH
IPP Program Current
VPP = VCC
VIL Input Low Voltage
–0.1
VIH Input High Voltage
2
VOL Output Low Voltage
IOL = 2.1mA
VOH Output High Voltage
IOH = –400µA
2.4
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Max
±10
±10
75
35
5
0.8
VCC + 1
0.45
Table 7A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Alt
Parameter
tAVQV
tACC
Address Valid to
Output Valid
tELQV
tCE
Chip Enable Low
to Output Valid
tGLQV
tOE
Output Enable
Low to Output Valid
tEHQZ (2)
tDF
Chip Enable High
to Output Hi-Z
tGHQZ (2)
tDF
Output Enable
High to Output Hi-Z
tAXQX
tOH
Address Transition
to Output Transition
Test
Condition
E = VIL,
G = VIL
G = VIL
-1
Min Max
180
180
E = VIL
65
G = VIL 0 55
E = VIL 0 55
E = VIL,
G = VIL
0
M2764A
-2, -20
Min Max
200
200
75
0 55
0 55
0
blank, -25
Min Max
250
250
100
0 60
0 60
0
Unit
µA
µA
mA
mA
mA
V
V
V
V
Unit
ns
ns
ns
ns
ns
ns
Table 7B. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Alt
Parameter
Test
Condition
M2764A
-3 -4
Min Max Min Max
tAVQV
tACC
Address Valid to
Output Valid
E = VIL,
G = VIL
300
450
tELQV
tCE
Chip Enable Low
to Output Valid
G = VIL
300
450
tGLQV
tOE
Output Enable
Low to Output Valid
E = VIL,
120
150
tEHQZ (2)
tDF
Chip Enable High
to Output Hi-Z
G = VIL
0
105
0
130
tGHQZ (2)
tDF
Output Enable
High to Output Hi-Z
E = VIL
0
105
0
130
tAXQX
tOH
Address Transition
to Output Transition
E = VIL,
G = VIL
0
0
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Unit
ns
ns
ns
ns
ns
ns
5/10
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