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PDF E413511 Data sheet ( Hoja de datos )
| Número de pieza | E413511 | |
| Descripción | D/A Converter for Digital Tuning | |
| Fabricantes | Fuji Electric | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-13511-2E
Linear IC Converter
CMOS
D/A Converter for Digital Tuning
(12-channel, 8-bit, on-chip OP amp, low-voltage)
MB88346L
s DESCRIPITON
The Fujitsu MB88346L is an 8-bit D/A converter capable of low-voltage operation, and designed with a built-in
amp on each of its 12 analog output lines for large-current drive capability.
The use of serial data input means that only three control lines are required, and enables cascade connection
of multiple MB88346L chips.
The MB88346L is suitable for applications such as electronic volume controls and replacement of semi-fixed
resistors in tuning systems.
In addition, the MB88346L is both function-compatible and pin-compatible with the MB88346B now in use,
allowing easy substitution of the MB88346L for reduced supply voltage.
s FEATURES
• Low voltage operation (VCC/VDD: 2.7 to 3.6 V)
• Ultra-low power consumption (0.5 mW/ch at VCC = 3 V)
• Ultra-compact space-saving package lineup (SSOP-20)
• Contains 12-channel R-2R type 8-bit D/A converter
• On-chip analog output amps (sink current max. 1.0 mA, source current max. 1.0 mA)
• Analog output range from 0 to VCC
• Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and
D/A converter block
• Serial data input, maximum operating speed 2.5 MHz
• (maximum operating speed in cascade connection is 1.5 MHz)
• CMOS process
• Package lineup includes DIP 20-pin, SOP 20-pin, SSOP 20-pin.
s PACKAGES
20-pin plastic DIP
20-pin plastic SOP
20-pin plastic SSOP
(DIP-20P-M02)
(FPT-20P-M01)
(FPT-20P-M03)
1 page  
MB88346L
s DATA CONFIGURATION
The MB88346L has a 12-bit shift register for chip control functions. The 12-bit shift register must be used to set
up data in the configuration shown below.
The data configuration has a total of 12 bits, four for address selection and eight for D/A data output.
1. Shift Register Control Data Configuration
Last First
LSB MSB
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
D/A data output
Address selection
2. D/A Converter Control Signals
D0 D1 D2 D3 D4 D5 D6 D7
D/A data output
0 0 0 0 0 0 0 0 ≅ VSS
1 0 0 0 0 0 0 0 ≅ VLB+ VSS
0 1 0 0 0 0 0 0 ≅ VLB × 2 + VSS
••••••••
••••••••
••••••••
•
•
•
0 1 1 1 1 1 1 1 ≅ VLB × 254 + VSS
1 1 1 1 1 1 1 1 ≅ VDD
VLB = (VDD – VSS)/255
5
5 Page 
MB88346L
2. AC Characteristics
Prameter
Clock L level pulse width
Clock H level pulse width
Clock rise time
Clock fall time
Data setup time
Data hold time
Load setup time
Load hold time
Load H level pulse width
Data output delay time
D/A output settling time
(VDD, VCC = +2.7 V to 3.6 V (VCC ≥ VDD), GND = VSS = 0 V, Ta = –20°C to +85°C)
Symbol
Condition
Value
Min.
Max.
Unit
tCKL — 200 — ns
tCKH — 200 — ns
tCr
tCf
— — 200 ns
tDCH — 30 — ns
tCHD — 60 — ns
tCHL — 200 — ns
tLDC — 100 — ns
tLDH — 100 — ns
tDO
See “• Load condition 1”
70
600 ns
tLDD See “• Load condition 2” —
300 µs
• Load condition 1
Measurement point
CL = 20 pF
to 100 pF
• Load condition 2
R AL = 10 kΩ
Measurement point
CAL = 50 pF
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet E413511.PDF ] | |
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