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Fairchild Semiconductor - 1 of 8 Line Data Selector/Multiplexer

Numéro de référence DM74ALS151
Description 1 of 8 Line Data Selector/Multiplexer
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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DM74ALS151 fiche technique
April 1984
Revised February 2000
DM74ALS151
1 of 8 Line Data Selector/Multiplexer
General Description
This Data Selector/Multiplexer contains full on-chip decod-
ing to select one-of-eight data sources as a result of a
unique three-bit binary code at the Select inputs. Two com-
plementary outputs provide both inverting and non-invert-
ing buffer operation. A Strobe input is provided which,
when at the high level, disables all data inputs and forces
the Y output to the LOW state and the W output to the
HIGH state. The Select input buffers incorporate internal
overlap features to ensure that select input changes do not
cause invalid output transients.
Features
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Switching performance is guaranteed over full tempera-
ture and VCC supply range
s Pin and functional compatible with LS family counterpart
s Improved output transient handling capability
Ordering Code:
Order Number Package Number
Package Description
DM74ALS151M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74ALS151N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Select
Strobe
CBA
S
XXX
H
LLL
L
L LH
L
LHL
L
L HH
L
HL L
L
HLH
L
HH L
L
HHH
L
H = HIGH Level
L = LOW Level
X = Don't Care
D0 thru D7 = the level of the respective D input
Outputs
YW
LH
D0 D0
D1 D1
D2 D2
D3 D3
D4 D4
D5 D5
D6 D6
D7 D7
© 2000 Fairchild Semiconductor Corporation DS006203
www.fairchildsemi.com

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