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Fairchild Semiconductor - Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs

Numéro de référence DM74AS574WM
Description Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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DM74AS574WM fiche technique
October 1986
Revised March 2000
DM74AS574
Octal D-Type Edge-Triggered Flip-Flops
with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased HIGH-logic-level drive provide these registers
with the capability of being connected directly to and driv-
ing the bus lines in a bus-organized system without need
for interface or pull-up components. They are particularly
attractive for implementing buffer registers, I/O ports, bidi-
rectional bus drivers, and working registers.
The eight flip-flops of the DM74AS574 are edge-triggered
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
The pinout is arranged to ease printed circuit board layout.
All data inputs are on one side of the package while all the
outputs are on the other side.
Features
s Switching specifications at 50 pF
s Switching specifications guaranteed over full tempera-
ture and VCC range
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Functionally equivalent with DM74S374
s Improved AC performance over DM74S374 at approxi-
mately half the power
s 3-STATE buffer-type outputs drive bus lines directly
s Bus structured pinout
Ordering Code:
Order Number Package Number
Package Description
DM74AS574WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS574N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2000 Fairchild Semiconductor Corporation DS006314
www.fairchildsemi.com

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