DataSheetWiki


AZ100LVEL16VRLR1 fiches techniques PDF

ETC - ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable

Numéro de référence AZ100LVEL16VRLR1
Description ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable
Fabricant ETC 
Logo ETC 





1 Page

No Preview Available !





AZ100LVEL16VRLR1 fiche technique
ARIZONA MICROTEK, INC.
AZ100LVEL16VR
ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable
FEATURES
High Bandwidth for 1GHz
Similar Operation as AZ100EL16VO
Operating Range of 3.0V to 5.5V
Minimizes External Components
Selectable Enable Polarity and Threshold
(CMOS/TTL or PECL)
Available in a 3x3mm MLP Package
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE
MLP 16
MLP 16 T&R
MLP 16 T&R
DIE
PART NO.
AZ100LVEL16VRL
AZ100LVEL16VRLR1
AZ100LVEL16VRLR2
AZ100LVEL16VRX
MARKING
AZM16R
AZM16R
AZM16R
N/A
The AZ100LVEL16VR is a specialized oscillator gain stage with high gain output buffer including an enable.
The QHG/Q¯ HG outputs have a voltage gain several times greater than the Q/Q¯ outputs.
The AZ100LVEL16VR provides a selectable enable that allows continuous oscillator operation. See truth table
below for enable function. If Enable pull-up is desired in the CMOS mode, an external 20kresistor connecting
EN to VCC will override the on-chip pull-down resistor. The AZ100LVEL16VR also provides a VBB and 470
internal bias resistors from D to VBB and D¯ to VBB. The VBB pin can support 1.5mA sink/source current. Bypassing
VBB to ground with a 0.01 µF capacitor is recommended.
Outputs Q/Q¯ each have a selectable on-chip pull-down current source. See truth table below for current source
functions. External resistors may also be used to increase pull-down current to a maximum total of 25mA.
Outputs QHG/Q¯ HG each have an optional on-chip pull-down current source of 10mA. When pad/pin VEEP is left
open (NC), the output current sources are disabled and the QHG /Q¯ HG operate as standard PECL/ECL. When VEEP is
connected to VEE , the current sources are activated. The QHG /Q¯ HG pull-down current can be decreased, by using a
resistor to connect from VEEP to VEE.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
1630 S. STAPLEY DR., SUITE 125 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541
www.azmicrotek.com

PagesPages 6
Télécharger [ AZ100LVEL16VRLR1 ]


Fiche technique recommandé

No Description détaillée Fabricant
AZ100LVEL16VRLR1 ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable ETC
ETC
AZ100LVEL16VRLR2 ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable ETC
ETC

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche