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PDF 74ACTQ544 Data sheet ( Hoja de datos )
| Número de pieza | 74ACTQ544 | |
| Descripción | Quiet Series Octal Registered Transceiver with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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March 1990
Revised September 2000
74ACQ544 • 74ACTQ544
Quiet Series Octal Registered Transceiver
with 3-STATE Outputs
General Description
The ACQ/ACTQ544 is an inverting octal transceiver con-
taining two sets of D-type registers for temporary storage of
data flowing in either direction. Separate Latch Enable and
Output Enable inputs are provided for each register to per-
mit independent input and output control in either direction
of data flow. The 544 inverts data in both directions.
The ACQ/ACTQ utilizes Fairchild FACT Quiet Series
technology to guarantee quiet output switching and
improved dynamic threshold performance. FACT Quiet
Series features GTO output control and undershoot cor-
rector in addition to a split ground bus for superior perfor-
mance.
Features
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s 8-bit inverting octal latched transceiver
s Separate controls for data flow in each direction
s Back-to-back registers for storage
s Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74ACQ544SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACQ544SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ544SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ544SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A0 –A7
B0 –B7
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS010685
www.fairchildsemi.com
1 page  
AC Electrical Characteristics for ACQ
VCC
TA = +25°C
TA = − 40°C to + 85°C
Symbol
Parameter
(V) CL = 50 pF
CL = 50 pF
Units
(Note 13)
Min
Typ
Max
Min
Max
tPLH Propagation Delay
tPHL Transparent Mode
An to Bn or Bn to An
tPLH Propagation Delay
tPHL LEBA, LEAB to An, Bn
Output Enable Time
3.3 1.5 8.0 11.0 1.5 12.0
5.0 1.5 5.0 7.5 1.5 8.0
3.3 1.5 8.5 12.0 1.5 12.5
5.0 1.5 6.0 8.0 1.5 8.5
3.3
1.5
10.0
14.0
1.5
15.0
ns
ns
tPZH
OEBA or OEAB to An or Bn
tPZL CEBA or CEAB to An or Bn
Output Disable Time
5.0 1.5 7.0 9.5 1.5 10.0
3.3 1.0 7.5 10.5 1.0 11.0
ns
tPHZ
OEBA or OEAB to An or Bn
tPLZ CEBA or CEAB to An or Bn
tOSHL
Output to Output
tOSLH
Skew (Note 14)
Note 13: Voltage Range 5.0 is 5.0V ± 0.5V
Voltage Range 3.3 is 3.3V ± 0.3V
5.0 1.0 5.0 7.0 1.0 7.5
3.3 1.0 1.5 1.5
5.0 0.5 1.0 1.0
ns
ns
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACQ
Symbol
Parameter
tS Setup Time, HIGH or LOW
An or Bn to LEBA or LEAB
tH Hold Time, HIGH or LOW
An or Bn to LEBA or LEAB
tW Latch Enable, B to A
Pulse Width, LOW
Note 15: Voltage Range 5.0 is 5.0V ± 0.5V
Voltage Range 3.3 is 3.0V ± 0.3V
VCC
(V)
(Note 15)
3.3
5.0
3.3
5.0
3.3
5.0
TA = +25°C
CL = 50 pF
Typ
3.0
TA = − 40°C to + 85°C
CL = 50 pF
Guaranteed Minimum
3.0
1.5 1.5
4.0 4.0
Units
ns
ns
ns
5 www.fairchildsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74ACTQ544.PDF ] | |
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