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PDF 74ALVCH32501 Data sheet ( Hoja de datos )

Número de pieza 74ALVCH32501
Descripción 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
DATA SHEET
74ALVCH32501
36-bit universal bus transceiver with
direction pin; 5 V tolerant; 3-state
Product specification
File under Integrated Circuits, IC24
2000 Mar 16

1 page




74ALVCH32501 pdf
Philips Semiconductors
36-bit universal bus transceiver with direction pin;
5 V tolerant; 3-state
Product specification
74ALVCH32501
1OEAB
1CPBA
1LEBA
1CPAB
1LEAB
1OEBA
1A0
C1 C1
1D 1D
handbook, halfpage
VCC
data
input
1B0
to internal circuit
MNA473
C1 C1
1D 1D
18 IDENTICAL CHANNELS
2OEAB
2CPBA
2LEBA
2CPAB
2LEAB
2OEBA
C1 C1
2A0 1D 1D
2B0
Fig.3 Bus-hold circuit.
C1 C1
1D 1D
18 IDENTICAL CHANNELS
Fig.2 Logic symbol.
2000 Mar 16
MNA563
5

5 Page





74ALVCH32501 arduino
Philips Semiconductors
36-bit universal bus transceiver with direction pin;
5 V tolerant; 3-state
Product specification
74ALVCH32501
handbook, full pagewidth
OEAB input
OEBA input
output VCC
LOW-to-OFF
OFF-to-LOW
VOL
output VOH
HIGH-to-OFF
OFF-to-HIGH
GND
VM
t PLZ
VM
t PZL
t PHZ
VX
VY
VM
t PZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
MNA566
VCC
2.3 to 2.7 V
2.7 V
3.0 to 3.6 V
VM
0.5 × VCC
1.5 V
1.5 V
VX
VOL + 150 mV
VOL + 300 mV
VOL + 300 mV
VY
VOH 150 mV
VOH 300 mV
VOH 300 mV
VI
VCC
2.7 V
2.7 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 3-state enable and disable times.
handbook, full pagewidth
nAn, nBn
input
VI
GND
nLEAB, nLEBA, VI
nCPAB, nCPBA
input
GND
VM
th
tsu
VM
tsu
The shaded areas indicate when the input is permitted to change for predictable output performance.
th
MNA567
VCC
2.3 to 2.7 V
2.7 V
3.0 to 3.6 V
VM
0.5 × VCC
1.5 V
1.5 V
VI
VCC
2.7 V
2.7 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 Data set-up and hold times for the nAn and nBn inputs to the nLEAB, nLEBA, nCPAB and nCPBA inputs.
2000 Mar 16
11

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