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PDF 74ABT125 Data sheet ( Hoja de datos )
| Número de pieza | 74ABT125 | |
| Descripción | Quad buffer | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74ABT125
Quad buffer; 3-state
Rev. 7 — 25 November 2015
Product data sheet
1. General description
The 74ABT125 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT125 device is a quad buffer that is ideal for driving bus lines. The device
features four output enable inputs (1OE, 2OE, 3OE, 4OE), each controlling one of the
3-state outputs.
2. Features and benefits
Quad bus interface
3-state buffers
Live insertion and extraction permitted
Output capability: HIGH 32 mA; LOW +64 mA
Power-up 3-state
Inputs are disabled during 3-state mode
Latch-up protection exceeds 500 mA per JESD78 class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74ABT125D 40 C to +85 C
74ABT125DB 40 C to +85 C
74ABT125PW 40 C to +85 C
74ABT125BQ 40 C to +85 C
Name
Description
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1
1 page  
NXP Semiconductors
74ABT125
Quad buffer; 3-state
Table 6. Static characteristics …continued
Symbol Parameter
Conditions
25 C
40 C to +85 C Unit
Min Typ Max Min Max
ICC
additional supply
current
per control pin; VCC = 5.5 V;
one control input at 3.4 V, other
inputs at VCC or GND
outputs enabled
[3]
- 0.5 1.5
-
1.5 mA
outputs disabled
- 50 250
-
250 mA
one enable input at 3.4 V and other
inputs at VCC or GND; outputs
disabled
- 0.5 1.5
-
1.5 mA
CI
input capacitance
VI = 0 V or VCC
CO output capacitance outputs disabled; VO = 0 V or VCC
-4-
-7-
-
-
- pF
- pF
[1] This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms. From VCC = 2.1 V to VCC = 5 V 10 %,
a transition time of up to 100 s is permitted.
[2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[3] This is the increase in supply current for each input at 3.4 V.
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V. Test circuit is shown in Figure 8.
Symbol Parameter
Conditions
tPLH LOW to HIGH
nA to nY, see Figure 6
propagation delay
tPHL HIGH to LOW
nA to nY; see Figure 6
propagation delay
tPZH OFF-state to HIGH nOE to nY; see Figure 7
propagation delay
tPZL OFF-state to LOW nOE to nY; see Figure 7
propagation delay
tPHZ HIGH to OFF-state nOE to nY; see Figure 7
propagation delay
tPLZ LOW to OFF-state nOE to nY; see Figure 7
propagation delay
25 C; VCC = 5.0 V 40 C to +85 C; Unit
VCC = 5.0 V 0.5 V
Min Typ Max Min
Max
1.0 2.8 4.1
1.0
4.6 ns
1.0 3.1 4.6
1.0
4.9 ns
1.0 3.2 5.0
1.0
5.9 ns
1.0 4.2 6.2
1.0
6.8 ns
1.0 4.1 5.4
1.0
6.2 ns
1.5 2.8 5.0
1.5
5.5 ns
74ABT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 25 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
74ABT125
Quad buffer; 3-state
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Fig 12. Package outline SOT762-1 (DHVQFN14)
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74ABT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 25 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
11 of 15
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet 74ABT125.PDF ] | |
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