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Fairchild Semiconductor - Quad Buffer with 3-STATE Outputs

Numéro de référence 74ACT125SJ
Description Quad Buffer with 3-STATE Outputs
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74ACT125SJ fiche technique
March 1990
Revised November 1999
74AC125 74ACT125
Quad Buffer with 3-STATE Outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Features
s ICC reduced by 50%
s Outputs source/sink 24 mA
s ACT125 has TTL-compatible outputs
Ordering Code:
Order Number Package Number
Package Description
74AC125SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body
74AC125SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC125PC
N14A
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300Wide
74ACT125SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body
74ACT125SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT125PC
N14A
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
Function Table
Inputs
An Bn
LL
LH
HX
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
X = Immaterial
Output
On
L
H
Z
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010692
www.fairchildsemi.com

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