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Samsung semiconductor - 128Kx36/x32 & 256Kx18 Synchronous SRAM

Numéro de référence K7A401809B
Description 128Kx36/x32 & 256Kx18 Synchronous SRAM
Fabricant Samsung semiconductor 
Logo Samsung semiconductor 





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K7A401809B fiche technique
K7A403609A
K7A401809A
128Kx36 & 256Kx18 Synchronous SRAM
Document Title
128Kx36 & 256Kx18-Bit Synchronous Pipelined Burst SRAM
Revision History
Rev. No History
0.0 Initial draft
0.1 Add tCYC 300MHz.
0.2 1. Changed DC condition at Icc and ISB.
Icc ; from 540mA to 590mA at -30,
from 490mA to 540mA at -27,
from 440mA to 490mA at -25,
from 410mA to 460mA at -22,
from 390mA to 440mA at -20,
from 370mA to 420mA at -18,
ISB ; from 190mA to 200mA at -30,
from 180mA to 190mA at -27,
from 170mA to 180mA at -25,
from 160mA to 170mA at -22,
from 150mA to 160mA at -20,
from 140mA to 150mA at -18,
1.0 1. Final spec release
2. Changed input & output capacitance.
CIN ; from 6pF to 5pF,
COUT ; from 8pF to 7pF,
3.Changed part number
from K7A4036(18)00A -under 167MHz to K7A4036(18)09A -over183MHz
2.0 1. Changed Input setup at -275MHz and 300MHz
From 0.8ns to 0.75ns,
3.0 1. Changed Input setup at -300MHz
From 0.75ns to 0.6ns
Draft Date
Jan. 22. 2000
Feb. 10. 2000
April. 03. 2000
May. 15. 2000
August. 17. 2000
August. 30. 2000
Remark
Preliminary
Preliminary
Preliminary
Final
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 - August 2000
Rev 3.0

PagesPages 17
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