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PDF SL1062A Data sheet ( Hoja de datos )
| Número de pieza | SL1062A | |
| Descripción | Low Voltage Transmission Circuit with Dialler Interface | |
| Fabricantes | System Logic Semiconductor | |
| Logotipo |  |
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SL1062A
Low Voltage Transmission Circuit
with Dialler Interface
The SL1062A is an integrated circuit that perform all speech and line
interface functions required in fully electronic telephone sets. They
perform electronic switching between dialling and speech. The ICs
operate at line voltage down to 1.6 V DC (with reduced performance)
to facilitate the use of more telephone sets connected in parallel.
• Low DC line voltage: operates down to 1.6 V (excluding polarity
guard)
• Voltage regulator with adjustable static resistance
• Provides a supply for external circuits
• Symmertical high-impedance inputs (64 KΩ) for dynamic,
magnetic or piezo-electric microphones
• Asymmetrical high-impedance input (32 KΩ) for electret
microphones
• DTMF signal input with confidence tone
• Mute input for pulse or DTMF dialing:
active LOW (MUTE)
• Receiving amplifier for dynamic, magnetic or piezo-electric
earpieces
• Large gain setting ranges on microphone and earpiece amplifiers
• Line loss compensation (line current dependent) for microphone
and earpiece amplifiers
• Gain control curve adaptable to exchange supply
• DC line voltage adjustment facility
ORDERING INFORMATION
SL1062AN Plastic
TA = -25° to 75° C
for package
PIN ASSIGNMENT
BLOCK DIAGRAM
SLS
System Logic
Semiconductor
1 page  
SL1062A
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Conditions
Iline Operating line current
normal operation
with reduced performance
VCC Supply voltage for
peripherals
GV Voltage gain
microphone amplifier
receiving amplifier
Iline = 15 mA
Ip = 1.2 mA; MUTE = LOW
Ip = 0 mA; MUTE = LOW
Tamb Operating ambient
temperature
Line loss compensation
∆GV Gain control
Vexch Exchange supply voltage
Rexch Exchange feeding bridge
resistance
Min Typ Max Unit
11 - 140 mA
1 - 11 mA
2.2 -
- 3.4
-
-
V
V
44 - 52
20 - 31
dB
dB
-25 - +75
°C
- 5.8 -
36 - 60
0.4 -
1
dB
V
KΩ
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
ELECTRICAL CHARACTERISTICS(Iline = 11 to 140 mA; VEE = 0 V; f = 800 Hz;Tamb = 25°C; unless
other specified)
Symbol
Parameter
Test Conditions
Guaranteed Limits
Unit
Min Typ Max
Supplies LN and VCC (pins 1 and 13)
VLN Voltage Drop Over Circuit
between LN and VEE
∆VLN/∆T
VLN
ICC
Variation with Temperature
Voltage Drop Over Circuit
between LN and VEE with
External Resistor RVA
Supply Current
MIC Inputs Open-Circuit
Iline = 1 mA
Iline = 4 mA
Iline = 15 mA
Iline = 100 mA
Iline = 140 mA
Iline = 15 mA
Iline = 15 mA
RVA (LN to REG)=68KΩ
RVA (LN to SLPE)=39KΩ
VCC = 2.8 V
- 1.6 -
- 1.9 -
3.56 - 4.25
4.9 - 6.5
- - 7.5
V
- -0.3 - mV/K
V
3.5
4.5
1.35 mA
(continued)
SLS
System Logic
Semiconductor
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet SL1062A.PDF ] | |
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