DataSheetWiki


ZL38001 fiches techniques PDF

Zarlink Semiconductor Inc - Low-Voltage Acoustic Echo Canceller with Low ERL Compensation

Numéro de référence ZL38001
Description Low-Voltage Acoustic Echo Canceller with Low ERL Compensation
Fabricant Zarlink Semiconductor Inc 
Logo Zarlink Semiconductor Inc 





1 Page

No Preview Available !





ZL38001 fiche technique
ZL38001
Low-Voltage Acoustic Echo Canceller
with Low ERL Compensation
Data Sheet
Features
• Contains two echo cancellers: 112 ms acoustic
echo canceller
• Works with low cost voice codec. ITU-T G.711 or
signed mag µ/A-Law, or linear 2’s comp
• Each port may operate in different format
• Advanced NLP design - full duplex speech with
no switched loss on audio paths
• Fast re-convergence time: tracks changing echo
environment quickly
• Adaptation algorithm converges even during
Double-Talk
• Designed for exceptional performance in high
background noise environments
• Provides protection against narrow-band signal
divergence
• Howling prevention stops uncontrolled oscillation
in high loop gain conditions
• Offset nulling of all PCM channels
• Serial micro-controller interface
June 2004
Ordering Information
ZL38001DGA 36 Pin QSOP
ZL38001QDC 48 Pin TQFP
-40°C to +85°C
• ST-BUS, GCI, or variable-rate SSI PCM interfaces
• User gain control provided for speaker path
(-24 dB to +48 dB in 3 dB steps)
• 18 dB gain at Sout to compensate for high ERL
environments
• AGC on speaker path
• Handles up to 0 dB acoustic echo return loss
• Transparent data transfer and mute options
• 20 MHz master clock operation
• Low power mode during PCM Bypass
• Bootloadable for future factory software upgrades
• 2.7 V to 3.6 V supply voltage; 5 V-tolerant inputs
Sin
MD1
MD2
Rout
µ/A-Law/
Linear
Offset
Null
NBSD
S1 + +
-
Limiter
S2 ADV
S3
NLP
18dB
Gain
Linear/
µ/A-Law
Adaptive
Filter
R3
CONTROL
UNIT
Double
Talk
Detector
Program
RAM
Program
ROM
Micro
Interface
Howling
R1 NBSD Controller
Linear/
µ/A-Law
-24 -> +48dB
AGC
User
Gain
Limiter
R2
Offset
Null
µ/A-Law/
Linear
VDD
VSS
RESET FORMAT ENA2
ENA1 LAW F0i BCLK/C4i MCLK
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.
Sout
DATA1
DATA2
SCLK
CS
Rin

PagesPages 30
Télécharger [ ZL38001 ]


Fiche technique recommandé

No Description détaillée Fabricant
ZL38001 Low-Voltage Acoustic Echo Canceller with Low ERL Compensation Zarlink Semiconductor Inc
Zarlink Semiconductor Inc
ZL38002 Digital Echo Canceller Zarlink Semiconductor
Zarlink Semiconductor
ZL38003 AEC Zarlink Semiconductor
Zarlink Semiconductor
ZL38004 Dedicated Voice Processor Zarlink Semiconductor
Zarlink Semiconductor

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche