X84256V14-2.5 Datasheet PDF - Xicor
| Part Number | X84256V14-2.5 | |
| Description | UPort Saver EEPROM | |
| Manufacturers | Xicor | |
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Preliminary
256K
X84256
µPort Saver EEPROM
MPS™ EEPROM
FEATURES
• Up to 10MHz data transfer rate
• 25ns Read Access Time
• Direct Interface to Microprocessors and
Microcontrollers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
• Low Power CMOS
—2.5V–5.5V and 5V ±10% Versions
—Standby Current Less than 1µA
—Active Current Less than 3mA
• Byte or Page Write Capable
—64-Byte Page Write Mode
• Typical Nonvolatile Write Cycle Time: 2ms
• High Reliability
—1,000,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
• Small Packages Options
—8, 16-Lead SOIC Packages
—14-Lead TSSOP Packages
—8-Lead XBGA Packages
DESCRIPTION
The µPort Saver memories need no serial ports or spe-
cial hardware and connect to the processor memory bus.
Replacing bytewide data memory, the µPort Saver uses
bytewide memory control functions, takes a fraction of
the board space and consumes much less power.
Replacing serial memories, the µPort Saver provides all
the serial benefits, such as low cost, low power, low volt-
age, and small package size while releasing I/Os for
more important uses.
The µPort Saver memory outputs data within 25ns of an
active read signal. This is less than the read access time
of most hosts and provides “no-wait-state” operation.
This prevents bottlenecks on the bus. With rates to 10
MHz, the µPort Saver supplies data faster than required
by most host read cycle specifications. This eliminates
the need for software NOPs.
The µPort Saver memories communicate over one line
of the data bus using a sequence of standard bus read
and write operations. This “bit serial” interface allows the
µPort Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit
systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data reten-
tion is greater than 100 years.
BLOCK DIAGRAM
System Connection
Ports
Saved
µP
µC
DSP
ASIC
RISC
P0/CS
P1/CLK
P2/DI
P3/DO
A15
A0
D7
D0
OE
WE
Internal Block Diagram
MPS
WP H.V. GENERATION
TIMING & CONTROL
CE
COMMAND
I/O DECODE
OE
AND
CONTROL
LOGIC
WE
X
DEC
EEPROM
ARRAY
32K x 8
Y DECODE
DATA REGISTER
©Xicor, Inc. 1998 Patents Pending
4005 1 8/24/99 WW
1 Characteristics subject to change without notice
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X84256
Preliminary
—Write ‘1’—when reading data
—Read/Read/Write ‘1’—after data is written to device,
but before entering the NV write sequence.
—the device powers-up;
—a nonvolatile write operation completes.
While a sequential read is in progress, the device remains
in an active state. This state draws more current than the
idle state, but not as much as during a read itself. To go
back to the lowest power condition, an invalid condition is
created by writing a ‘1’ after the last bit of a read operation.
Write Protection
The following circuitry has been included to prevent
inadvertent nonvolatile writes:
—A special “start nonvolatile write” command sequence
is required to start a nonvolatile write cycle.
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias ...................... –65°C to +135°C
Storage Temperature ........................... –65°C to +150°C
Terminal Voltage with
Respect to VSS .......................................–1V to +7V
DC Output Current................................................... 5mA
Lead Temperature (Soldering, 10 seconds)..........300°C
RECOMMENDED OPERATING CONDITIONS
Temperature
Commercial
Industrial
Military†
Min.
0°C
–40°C
–55°C
Max.
+70°C
+85°C
+125°C
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation
of the device at these or any other conditions above
those indicated in the operational sections of this speci-
fication is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Supply Voltage
X84256
X84256 – 2.5
X84256 – 1.8
Limits
5V ±10%
2.5V to 5.5V
1.8V to 3.6V
D.C. OPERATING CHARACTERISTICS (VCC = 5V ±10%)
(Over the recommended operating conditions, unless otherwise specified.)
Symbol
Parameter
Limits
Min.
Max.
Units
Test Conditions
ICC1
VCC Supply Current (Read)
ICC2
ISB1
ILI
ILO
VlL (1)
VIH (1)
VOL
VOH
VCC Supply Current (Write)
VCC Standby Current
Input Leakage Current
Output Leakage Current
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
1
3
–0.5
VCC x 0.7
VCC – 0.8
1
10
10
VCC x 0.3
VCC + 0.5
0.4
mA OE = VIL, WE = VIH,
I/O = Open, CE clocking @ 10MHz
mA
ICC During Nonvolatile Write Cycle
All Inputs at CMOS Levels
µA CE = VCC, Other Inputs = VCC or VSS
µA VIN = VSS to VCC
µA VOUT = VSS to VCC
V
V
V IOL = 2.1mA
V IOH = –1mA
Notes: (1) VIL Min. and VIH Max. are for reference only and are not tested.
5
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