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PDF X9530 Data sheet ( Hoja de datos )

Número de pieza X9530
Descripción Temperature Compensated Laser Diode Controller
Fabricantes Xicor 
Logotipo Xicor Logotipo



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X9530
Temperature Compensated Laser Diode Controller
FEATURES
• Compatible with Popular Fiber Optic Module
Specifications such as Xenpak, SFF, SFP, and
GBIC
• Package
—14 Pin TSSOP
—15 Lead 2.7 x 3.5mm CSP (Chip-Scale
Package)
• Two Programmable Current Generators
—±1.6 mA max.
—8-bit (256 Step) Resolution
• Integrated 6 bit A/D Converter
• Temperature Compensation
—Internal or External Sensor
—–40°C to +100°C Range
—2.2°C / step resolution
—EEPROM Look-up Tables
• Hot Pluggable
• 2176-bit EEPROM
—17 Pages
—16 Bytes per Page
• Write Protection Circuitry
—Xicor BlockLock™
—Logic Controlled Protection
—2-wire Bus with 3 Slave Address Bits
• 3 V to 5.5 V, Single Supply Operation
LASER DIODE BIAS CONTROL APPLICATIONS
• SONET and SDH Transmission Systems
• 1G and 10G Ethernet, and Fibre Channel Laser
Diode Driver Circuits
TYPICAL APPLICATION
DESCRIPTION
The X9530 is a highly integrated laser diode bias
controller which incorporates two digitally controlled
Programmable Current Generators, temperature
compensation with dedicated look-up tables, and
supplementary EEPROM array. All functions of the
device are controlled via a 2-wire digital serial
interface.
Two temperature compensated Programmable Current
Generators, vary the output current with temperature
according to the contents of the associated nonvolatile
look-up table. The look-up table may be programmed
with arbitrary data by the user, via the 2-wire serial
port, and either an internal or external temperature
sensor may be used to control the output current
response. These temperature compensated pro-
grammable currents maybe used to control the
modulation current and the bias current of a laser
diode.
The integrated General Purpose EEPROM is included
for product data storage and can be used for
transceiver module information storage in laser diode
applications.
High Speed
Data Input
MOD_DEF(0)
MOD_DEF(1)
GBIC / SFP / XFP Module
X9530
I1 IMODSET
SDA
SCK
I2 IPINSET/IBIASSET
Laser
Diode
Driver
Circuit
VCC
LD
MPD
ILD IMON
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 1 of 30

1 page




X9530 pdf
X9530
Figure 1. Control and Status Register Format
Byte
MSB
LSB
Register
Address
Name
7 6 5 4 3 21 0
80h
Non-Volatile
I2DS
I1DS
I1 and I2 Direction
0: Source
1: Sink
NV1234 ADCfiltOff ADCIN
VRM
BL1
BL0 Control 0
Control
1, 2, 3, 4
Volatility
0: Volatile
1: Non-
volatile
ADC
filtering
0: On
1: Off
ADC Input
0: Internal
1: External
Voltage
Reference
Mode
0: Internal
1: External
Block Lock
00: None Locked
01: GPM Locked
10: GPM, LUT1, Locked
11: GPM, LUT1, LUT2
Locked
81h
Volatile or
Non-Volatile
Direct Access to LUT1
Reserved Reserved
L1DA5
L1DA4
L1DA3
L1DA2
L1DA1
L1DA0
Control 1
82h
Volatile or
Non-Volatile
Direct Access to LUT2
Reserved Reserved
L2DA5
L2DA4
L2DA3
L2DA2
L2DA1
L2DA0
Control 2
83h
Volatile or
Non-Volatile
Direct Access to DAC1
D1DA7 D1DA6
D1DA5
84h
Volatile or
Non-Volatile
Direct Access to DAC2
D2DA7 D2DA6
D2DA5
D1DA4
D2DA4
D1DA3
D2DA3
D1DA2
D2DA2
D1DA1
D2DA1
D1DA0
D2DA0
Control 3
Control 4
85h
Non-Volatile
D2DAS L2DAS D1DAS L1DAS I2FSO1 I2FSO0
Direct
Access
to DAC2
0: Disabled
1: Enabled
Direct
Access
to LUT2
0: Disabled
1: Enabled
Direct
Access
to DAC1
0: Disabled
1: Enabled
Direct
Access
to LUT1
0: Disabled
1: Enabled
R2 Selection
00: External
01: Low Internal
10: Middle Internal
11: High Internal
I1FSO1 I1FSO0
R1 Selection
00: External
01: Low Internal
10: Middle Internal
11: High Internal
Control 5
86h
Volatile
WEL Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Write
Enable
Latch
0: Write
Disabled
1: Write
Enabled
ADC Output
87h
Volatile
AD5
AD4 AD3 AD2
AD1
AD0 Reserved Reserved
Control 6
Status
Registers in byte addresses 88h through 8Fh are reserved.
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 5 of 30

5 Page





X9530 arduino
X9530
By examining the block diagram in Figure 5, we see
that the maximum current through pin I1 is set by fixing
values for V(VRef) and R1. The output current can
then be varied by changing the data byte at the D/A
converter input.
In general, the magnitude of the current at the D/A
converter output pins (I1, I2) may be calculated by:
Ix = (V(VRef) / (384 • Rx)) • N
where x =1,2 and N is the decimal representation of
the input byte to the corresponding D/A converter.
The value for the resistor Rx (x = 1,2) determines the
full scale output current that the D/A converter may
sink or source. The full scale output current has a
maximum value of ±1.6 mA, which is obtained using a
resistance of 510for Rx. This resistance may be
connected externally to pin Rx of the X9530, or may be
selected from one of three internal values. Bits I1FSO1
and I1FSO0 select the full scale output current setting
for I1 as described in “I1FSO1–I1FSO0: Current
Generator 1 Full Scale Output Set Bits (Non-volatile)”
on page 6. Bits I2FSO1 and I2FSO0 select the
maximum current setting for I2 as described in
“I2FSO1–I2FSO0: Current Generator 2 Full Scale
Output Current Set Bits (Non-volatile)” on page 7.
When an internal resistor is selected for R1 or R2, then
no resistor should be connected externally at the
corresponding pin.
Bits I1DS and I2DS in Control Register 0 select the
direction of the currents through pins I1 and I2
independently (See “I1DS: Current Generator 1
Direction Select Bit (Non-volatile)” on page 4 and
“Control and Status Register Format” on page 5).
D/A Converter Output Current Response
When the D/A converter input data byte changes by an
arbitrary number of bits, the output current changes
from an intial current level (Ix) to some final level (Ix +
Ix). The transition is monotonic and glitchless.
D/A Converter Control
The data byte inputs of the D/A converters can be
controlled in three ways:
– 1) With the A/D converter and through the look-up
tables (default),
– 2) Bypassing the A/D converter and directly access-
ing the look-up tables,
– 3) Bypassing both the A/D converter and look-up
tables, and directly setting the D/A converter input
byte.
Figure 7. Look-Up Table Addressing
Voltage
Reference
Voltage Input
ADC
6
AD[5:0]
Status
Register
L2DA[5:0]:
Control
Register 2
D1
Out
D0
Select
LUT2 Row
Selection bits
L2DAS: bit 6 in
Control register 5
L1DA[5:0]:
Control
6
D1
Register 1
Out
D0
Select
LUT1 Row
Selection bits
L1DAS: bit 4 in
Control register 5
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 11 of 30

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