V53C318165A Datasheet PDF - Mosel Vitelic Corp
| Part Number | V53C318165A | |
| Description | 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM | |
| Manufacturers | Mosel Vitelic Corp | |
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MOSEL VITELIC
V53C318165A
3.3 VOLT 1M X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Extended Data Out Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
50
50 ns
25 ns
20 ns
84 ns
60
60 ns
30 ns
25 ns
104 ns
70
70 ns
35 ns
30 ns
124 ns
Features
s 1M x 16-bit organization
s EDO Page Mode for a sustained data rate
of 50 MHz
s RAS access time: 50, 60, 70 ns
s Dual CAS Inputs
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, Hidden Refresh, and
Self Refresh.
s Refresh Interval: 1024 cycles/16 ms
s Available in 42-pin 400 mil SOJ and 50/44-pin
400 mil TSOP-II
s Single +3.3 V ±0.3 V Power Supply
s TTL Interface
Description
The V53C318165A is a 1048576 x 16 bit high-
performance CMOS dynamic random access mem-
ory. The V53C318165A offers Page mode opera-
tion with Extended Data Output. The V53C318165A
has an symmetric address, 10-bit row and 10-bit
column.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as
20ns.
These features make the V53C318165A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
Package Outline
KT
••
Access Time (ns)
50 60 70
•••
Power
Std.
•
V53C318165A Rev. 1.0 January 1998
1
Temperature
Mark
Blank
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MOSEL VITELIC
V53C318165A
AC Characteristics
TA = 0°C to 70°C, VCC = 3.3 V ±0.3 V, VSS = 0V, tT = 2ns unless otherwise noted
JEDEC
# Symbol Symbol Parameter
50 60 70
Min. Max. Min. Max. Min. Max. Unit Notes
1 tRL1RH1 tRAS
2 tRL2RL2 tRC
3 tRH2RL2 tRP
4 tRL1CH1 tCSH
5 tCL1CH1 tCAS
6 tRL1CL1 tRCD
7 tWH2CL2 tRCS
8 tAVRL2
tASR
9 tRL1AX
tRAH
10 tAVCL2
tASC
11 tCL1AX
tCAH
12 tCL1RH1(R) tRSH
13 tCH2RL2 tCRP
14 tCH2WX tRCH
RAS Pulse Width
Read or Write Cycle Time
RAS Precharge Time
CAS Hold Time
CAS Pulse Width
RAS to CAS Delay
Read Command Setup Time
Row Address Setup Time
Row Address Hold Time
Column Address Setup Time
Column Address Hold Time
RAS Hold Time
CAS to RAS Precharge Time
Read Command Hold Time
Referenced to CAS
50 10K 60 10K 70 10K ns
84 104 124 ns
30 40 50 ns
40 50 60 ns
8 10K 10 10K 12 10K ns
12 37 14 45 14 53 ns
0 0 0 ns
0 0 0 ns
8 10 10 ns
0 0 0 ns
8 10 12 ns
13 15 17 ns
5 5 5 ns
0 0 0 ns
9
15 tRH2WX tRRH
Read Command Hold Time
Referenced to RAS
0 0 0 ns 9
16 tCL1
17 tGL1QV
18 tCL1QV
19 tRL1QV
20 tAVQV
21 tCL1QX
22 tCH2QX
23 tCL1QZ
24 tRL1AV
25 tGL2QZ
26 tWL1CH1
27 tWL1CL2
28 tCL1WH1
29 tWL1WH1
30 tGL1QZ
31 tWL1RH1
32 tDVWL2
tCOH
tOAC
tCAC
tRAC
tCAA
tCLZ
tOFF
tDZC
tRAD
tOEZ
tCWL
tWCS
tWCH
tWP
tDEO
tRWL
tDS
Output Hold after CAS LOW
Access Time from OE
Access Time from CAS
Access Time from RAS
Access Time from Column Address
CAS to Low-Z Output
Output Buffer Turnoff Delay
Data to CAS Low Delay
RAS to Column Address Delay Time
Output Buffer Turnoff Delay from OE
Write Command to CAS Lead Time
Write Command Setup Time
Write Command Hold Time
Write Pulse Width
Data to OE Delay
Write Command to RAS Lead Time
Data in Setup Time
5 5 5 ns
13 15 17 ns
13 15 17 ns 7, 12
50 60 70 ns 7, 12
25 30 35 ns 7, 13
0 0 0 ns 7
0 13 0 15 0 17 ns
0 0 0 ns 15
10 25 12 30 12 35 ns
0 13 0 15 0 17 ns
8
13 15 17 ns
0 0 0 ns 11
8 10 10 ns
8 10 10 ns
0 0 0 ns 15
13 15 17 ns
0 0 0 ns 10
V53C318165A Rev. 1.0 January 1998
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for V53C318165A electronic component. |
| Information | Total 18 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ V53C318165A.PDF Datasheet ] | |
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| Part Number | Description | MFRS |
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