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PDF WARP20 Data sheet ( Hoja de datos )

Número de pieza WARP20
Descripción 8-BIT FUZZY CO-PROCESSOR
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! WARP20 Hoja de datos, Descripción, Manual

W.A.R.P.2.0
8-BIT FUZZY CO-PROCESSOR
PRELIMINARY DATA
Digital Fuzzy Co-processor 8-bit I/O
High Speed Rules Processing
4 Input, 2 Output, 32 Rules in 33.1µs
Up to 256 Rules (4 Antecedents,1 Consequent)
Up to 8 Input Configurable Variables
Up to 16 Membership Functions for an Input
Variable
Antecedent Membership Functions with
Triangular and Trapezoidal Shape
Up to 4 Output Variables
Up to 256 Membership Functions for all
Consequents
Singleton Consequent Membership Functions
Defuzzification on chip
Maximum Clock Frequency 40MHz
A/D Start Convertion Pulse presettable
Direct Interface to all popular microprocessor
Handshaking Signal Polarity presettable
Operates ”STAND ALONE” (without µP) if
desired
Standard +5V Supply Voltage
Software Tools and Emulators Availability
Pin number: 52
68-lead Plastic Leaded Chip Carrier package.
Figure 2. Simplified Block Diagram.
PLCC68
Figure 1. Logic Diagram.
MCLK VSS VDD WAIT
I0-I7
SIS0- SI S2
8
3
LASTIN
OE
AUTO
W.A.R. P.
2.0
12
O0-O11
2
OC 0-O C 1
DS
RD
READY
ENDOFL
ERR OFL PRESET BUSY
8
Input Port
with
HANDSHAKE
ALPHA
CALCULATOR
INFE RE NCE
UNIT
DEFUZZIFIER
8
Ouput Port
with
HANDSHAKE
INTERNAL BUS
ANTECE DENT
MEMORY
P ROGRAM &
CONSE QUENT
MEMORY
P ROGRAMMABLEA/D
OUTPUT PULSE
March 1996
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice.
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1 page




WARP20 pdf
W.A.R.P.2.0
DS. Data Strobe (Output, default active High): The
strobe pin enables the user to utilize the output.
When this pin is High it indicates that a new output
variable has been calculated and it is ready on the
output bus (O0-O7). This signal synchronizes the
external devices and in particular the interfaces
with the controlled processes (On-Line mode).
ERR. Error (Output, active Low): When this pin is
active, W.A.R.P.2.0 has incurred in an internal error
condition.
OC0-OC1. Output Counter (Output): This 2 bit
output bus provides the output variables with a
progressive number during the On-Line phase. As
a consequence it is possible to know to which
variable correspond the data that are on the output
data bus (O0-O7). The dimension of OC bus is
connected with the maximum number of output
variables (4).
O0-O11. Output Bus (Output): In the Off-Line
phase these pins provide the addresses (12 bit) for
its internal memories and send those addresses to
the external memory support where data to load are
located. These addresses sent on O0-O11 bus
allow to identify the data that have to be loaded in
W.A.R.P.2.0 internal memories.
In the On-Line phase O0-O7 carrie out the output
values. When the DS is High, one output variable
can be read by external devices. The resolution
of output variables is 256 points (8 bit). If there is
more than one output, the output variables are
calculated one by one and they are provided in
the sequence stabilized during the editing phase
(see FUZZYSTUDIO2.0 User Manual).
In On-Line mode O8-O10 provide the progressive
number of the next variable to be acquired. These
pins can be used to select the next input to provide
on I0-I7 bus.
Still in on-line mode O11 allows to provide a preset-
table signal which can be used as Start-Conversion
for an A/D converter after (about 400 ns) OFL or
BUSY fall.
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WARP20 arduino
W.A.R.P.2.0
Figure 11. Detailed Block Diagram
FL
YO
B U SE N D
ADY
RE
O
CO 0C 1 O
0O
1O
2O
3O
4O
5O
6O
7O
8O
0
9O
1
1O
1
R
E
RDS
Q
D
COUNTER
C O U N RT E R P R
MU X
C OMP
12 12
UN TE
O
C
P R 12
12
8
12
E RS D
OA
U
N
OMWOFBTOR
D
L
K
CL
4 DE F UZ
10
M
IP C
2M
TA D
6
TAD M4
I NF
4
UNI T
44
4
O CL
N
O
LT
OR
G
C
TU3
TU 2
IT U 1
TU0
7
6T I
T 5I
4T I
T 3I
2T I
T 1I
0T I
TI
16
2Q
D
TU0
M UX
Q
D
TU1
Q
D
TU 2
Q
D
TU3
4
CAL CUL AT O R
4
OFL
AIT
IN T W
D AIT
IN T R
IN T W
Q
D
MU X
16 32
K K/ /
C LC L
20
6
6
6
6
M UX
D
IN T CLR K
3
ER
ST
O GMNI C H
F RRBE E
6
2
M
TA D
MU X
32
DM
A
8
MU X
32 8 8 8 8 8 8 8 8
3
K
CL
Q Q0 Q1 2
PR
M 44
44
PC M
8 IP C
64
8
8
01
TI TI
8 8 88 8
2
TI
3
TI
4
TI
5
TI
6
TI
8
7
TI
QQQQQQQ Q
D P R D PR D PR D PR D PR D PR D PR D
PR
C OU N T E R
PR
Q Q0 Q1 2
D 10D D 2
D
IN T R
O F MLU X
MU X
8
I NP UT R E GI S T E R
IN O
S TS IS SIS 0SIAU1ST 2
R D S T I0
TE
I1
I2
I3
I4
I5 I6
I7
LA
Q
D
S
VS
Q
ST
R
D
OF L
VSS
OFL
T
RS
D
E TVD
ES
SS
V
L KAIT
M CW
O
PR
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