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PDF WT8045 Data sheet ( Hoja de datos )

Número de pieza WT8045
Descripción Synchronous Signal Discriminator and Power Saving Detector for Green Monitor
Fabricantes ETC 
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WT8045
Synchronous Signal Discriminator and
Power Saving Detector for Green Monitor

May 4, 1995
DESCRIPTION
The WT8045 is a silicon monolithic circuit designed for synchronous signal processing and power
saving detection of multi-sync display monitors, which can cope with many kinds of PC's and
workstations.
It can be applied to display monitors supporting standard IBM VGA, VESA super VGA and IBM
8514/A video modes. It can also be used in other high-end display monitors supporting non-standard
video modes with user-defined horizontal/vertical frequency ranges.
The WT8045 incorporates many functional circuits, including horizontal/vertical frequency
discrimination, display mode selection, and synchronous pulse polarity and power saving detection,
into this single chip IC.
WT8045 is more convenient for you to shrink the PC board size and to reduce the material and labor
cost with fewer components.
FEATURES
Accepting two separated H&V synchronous signals with positive/ negative polarity.
Support VESA VGA (640X480, 640X400, 640X350), VESA SVGA (800X600), European
SVGA (800X600), VESA new SVGA (800X600), XGA (1024X768) and 1280x1024.
Capable of processing horizontal frequency between 25KHZ to 80KHZ.
Standard IBM video mode control outputs (1024X768, 640X480, 640X400, 640X350).
Five non-standard horizontal frequency control outputs in predefined frequency range.
Power saving mode - It can detect the conditions of monitor to decide which one will be selected
as following: ON/STANDBY/SUSPEND/OFF mode.
Fixed polarity outputs on both horizontal and vertical synchronous signals.

Weltrend Semiconductor, Inc.
2F., No. 24, Industry E. 9th Rd.
Science-Based Industrial Park
Hsin-Chu, Taiwan, R.O.C.
Tel: 886-35-780241
Fax: 886-35-770419
1

1 page




WT8045 pdf
WT8045
Synchronous Signal Discriminator and
Power Saving Detector for Green Monitor

WT8045N28P1
OSCin
OSCout
HSin
VSin
H_out
V_out
F43.5K
F36.2K
F33K
QV128
QVRC
Vss
F52K
PM1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VDD
27 1024x768(56.5K)
26 1024x768 (NI)
25 1024x768 (I)
24 800x600(48K)
23 800x600(37.5K)
22 800x600(35.2K)
21 640x480
20 640x400
19 640x350
18 QH
17 QHRC
16 PM3
15 PM2
WT8045N28P3
OSCin
OSCout
HSin
VSin
H_out
V_out
F43.5K
F36.2K
F33K
QV1
QVRC
Vss
F52K
PM1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VDD
27 1024x768(56.5K)
26 1024x768 (NI)
25 1024x768 (I)
24 800x600(48K)
23 800x600(37.5K)
22 800x600(35.2K)
21 640x480
20 640x400
19 640x350
18 QH
17 QHRC
16 PM3
15 PM2

Weltrend Semiconductor, Inc.
2F., No. 24, Industry E. 9th Rd.
Science-Based Industrial Park
Hsin-Chu, Taiwan, R.O.C.
Tel: 886-35-780241
Fax: 886-35-770419
5

5 Page





WT8045 arduino
WT8045
Synchronous Signal Discriminator and
Power Saving Detector for Green Monitor

APPLICATION INFORMATION
Name
OSCin
OSCout
Hsin
Vsin
H_OUT
V_OUT
F43.5k
F36.2k
F33k
QV
QVRC
Vss
SELPIN
-QH
F52k
F60k
PM1
Function
A clock generating circuit is built into the chip. So if a resonator is I
connected to OSCin/OSCout, a clock signal can be obtained
Struncure
of
Terminal
Refer to OSCin pin
O
Input terminal of horizontal synchronous signal
I, TTL
compatible
Input terminal of vertical synchronous signal
I, TTL
compatible
Output pin, fixed negative polarity of original H_SYNC signal with I, TTL
same pulse width (but, positive for N28P2, N28P6,N28P7 and compatible
N28P8)
Output pin, fixed negative polarity of original V_SYNC signal with O, TTL
same pulse
N28P8)
width
(but,
positive
for
N28P2,
N28P6,N28P7
and
compatible
>43.5k then active low, <43.5k then high
O, open drain
>36.2k then active low, <36.2k then high
O, open drain
>33k then active low, <33k then high
O, open drain
Output pin, fixed positive polarity of vertical signal; pulse width O, open drain
depend upon RV & CV.
Input pin, connected to Vdd through RV & to ground through CV I
Ground
Input pin, to select which one of H_SYNC or V_SYNC appears on I,
the output pin of QV; N.C. selects
grounding selects the H_SYNC.
the
V-SYNC
on
the
output,
(N.C.-no
connection)
Output pin, fixed negative polarity of horizontal signal; pulse width O, open drain
depend upon RH & CH.
>52k then active low, <52k then high
O, open drain
>60k then active low, < 60k then high
O, open drain
Indicate in STAND-BY mode
O, open drain

Weltrend Semiconductor, Inc.
2F., No. 24, Industry E. 9th Rd.
Science-Based Industrial Park
Hsin-Chu, Taiwan, R.O.C.
Tel: 886-35-780241
Fax: 886-35-770419
11

11 Page







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