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PDF ZVP3310 Data sheet ( Hoja de datos )
| Número de pieza | ZVP3310 | |
| Descripción | P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET | |
| Fabricantes | Zetex Semiconductors | |
| Logotipo |  |
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P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 MARCH 94
FEATURES
* 100 Volt VDS
* RDS(on)=20Ω
ZVP3310A
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
D
G
S
E-Line
TO92 Compatible
VALUE
-100
-140
-1.2
± 20
625
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS -100
V ID=-1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) -1.5 -3.5 V
ID=-1mA, VDS= VGS
Gate-Body Leakage
IGSS
20 nA VGS=± 20V, VDS=0V
Zero Gate Voltage Drain
Current
IDSS
-1 µA VDS=-100V, VGS=0
-50 µA VDS=-80V, VGS=0V, T=125°C(2)
On-State Drain Current(1)
ID(on)
-300
mA VDS=-25 V, VGS=-10V
Static Drain-Source On-State RDS(on)
Resistance (1)
20 Ω
VGS=-10V,ID=-150mA
Forward Transconductance gfs
(1)(2)
50
mS VDS=-25V,ID=-150mA
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
50 pF
15 pF VDS=-25V, VGS=0V, f=1MHz
Reverse Transfer Crss 5 pF
Capacitance (2)
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
td(on)
tr
td(off)
tf
8 ns
8 ns VDD≈-25V, ID=-150mA
8 ns
8 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%
(2) Sample test.
3-432
Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
(
3
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1 page | ||
| Páginas | Total 3 Páginas | |
| PDF Descargar | [ Datasheet ZVP3310.PDF ] | |
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