|
|
PDF MC-4532DA727 Data sheet ( Hoja de datos )
| Número de pieza | MC-4532DA727 | |
| Descripción | 32M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE | |
| Fabricantes | NEC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MC-4532DA727 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4532DA727
32M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE
REGISTERED TYPE
Description
The MC-4532DA727 is an 33,554,432 words by 72 bits synchronous dynamic RAM module on which 18 pieces of
128M SDRAM: µPD45128441 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
• 33,554,432 words by 72 bits organization (ECC type)
• Clock frequency and access time from CLK.
Part number
MC-4532DA727EF-A75
5
5 MC-4532DA727PF-A75
/CAS latency
CL = 3
CL = 2
CL = 3
CL = 2
Clock frequency
(MAX.)
133 MHz
100 MHz
133 MHz
100 MHz
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and Full Page)
• Programmable wrap sequence (Sequential / Interleave)
5 • Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ±10 % of series resistor
• Single 3.3 V ±0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Registered type
• Serial PD
Access time from CLK
(MAX.)
5.4 ns
6.0 ns
5.4 ns
6.0 ns
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14210EJ3V0DS00 (3rd edition)
Date Published February 2000 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1999
1 page  
MC-4532DA727
Electrical Specifications
• All voltages are referenced to VSS (GND).
• After power up, wait more than 1 ms and then, execute power on sequence and CBR (Auto) refresh before proper
device operation is achieved.
Absolute Maximum Ratings
Parameter
Symbol
Condition
Rating
Unit
Voltage on power supply pin relative to GND
Voltage on input pin relative to GND
Short circuit output current
Power dissipation
Operating ambient temperature
Storage temperature
VCC
VT
IO
PD
TA
Tstg
–0.5 to +4.6
–0.5 to +4.6
50
22
0 to 70
–55 to +125
V
V
mA
W
°C
°C
Caution
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended Operating Conditions
Parameter
Symbol
Supply voltage
VCC
High level input voltage
VIH
Low level input voltage
VIL
Operating ambient temperature
TA
Condition
MIN.
3.0
2.0
–0.3
0
TYP. MAX. Unit
3.3 3.6
V
VCC + 0.3 V
+ 0.8
V
70 °C
Capacitance (TA = 25 °C, f = 1 MHz)
Parameter
Input capacitance
Data input/output capacitance
Symbol
Test condition
CI1 A0 - A11, BA0 (A13), BA1 (A12),
/RAS, /CAS, /WE
CI2 CLK0
CI3 CKE0
CI4 /CS0, /CS2
CI5 DQMB0 - DQMB7
CI/O DQ0 - DQ63, CB0 - CB7
MIN.
7
15
7
4
4
6
TYP.
MAX.
20
25
20
10
12
13
Unit
pF
pF
Data Sheet M14210EJ3V0DS00
5
5 Page 
MC-4532DA727
(2/2)
Byte No.
Function Described
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Notes
Command and address signal input
32
setup time
15H 0 0 0 1 0 1 0 1 1.5 ns
Command and address signal input hold
33 08H 0 0 0 0 1 0 0 0 0.8 ns
time
34 Data signal input setup time
15H 0 0 0 1 0 1 0 1 1.5 ns
35 Data signal input hold time
08H 0 0 0 0 1 0 0 0 0.8 ns
36-61
00H 0 0 0 0 0 0 0 0
62 SPD revision
02H 0 0 0 0 0 0 1 0 JEDEC 2
5
63 Checksum for bytes 0 - 62
-A75 E9H 1 1 1 0 1 0 0 1
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91 Revision Code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency
64H 0 1 1 0 0 1 0 0 100 MHz
127 Intel specification /CAS
latency support
-A75 85H 1 0 0 0 0 1 0 1
Timing Chart
Refer to the SYNCHRONOUS DRAM MODULE TIMING CHART Information (M13348E).
Data Sheet M14210EJ3V0DS00
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MC-4532DA727.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MC-4532DA726 | 32 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE | NEC |
| MC-4532DA727 | 32M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE | NEC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |