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PDF 74LVQ14 Data sheet ( Hoja de datos )
| Número de pieza | 74LVQ14 | |
| Descripción | Low Voltage Hex Inverter with Schmitt Trigger Input | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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May 1998
74LVQ14
Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
The LVQ14 contains six inverter gates each with a Schmitt
trigger input. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output sig-
nals. In addition, they have a greater noise margin than con-
ventional inverters.
The LVQ14 has hysteresis between the positive-going and
negative-going input thresholds (typically 1.0V) which is de-
termined internally by transistor ratios and is essentially in-
sensitive to temperature and supply voltage variations.
Features
n Ideal for low power/low noise 3.3V applications
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed pin-to-pin skew AC performance
n Guaranteed incident wave switching into 75Ω
Ordering Code:
Order Number
74LVQ14SC
74LVQ14SJ
Package Number
M14A
M14D
Package Description
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC
14-Lead Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment
for SOIC JEDEC and EIAJ
DS011345-1
Pin Descriptions
Pin Names
In
On
Description
Inputs
Outputs
Truth Table
DS011345-2
Input
I
L
H
H = High Voltage Level
L = Low Voltage Level
Output
O
H
L
© 1998 Fairchild Semiconductor Corporation DS011345
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC
Package Number M14A
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74LVQ14.PDF ] | |
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